使用I-line步進機與電子束微影並應用在MHEMT元件的新穎T-形閘極製作方法之研究

Abstract

本論文仲介紹了兩種嶄新的三五族半導體高頻元件的T-型閘極製程方法。 第一個方法是利用I-line步進機加上位移的方法來縮小閘極線寬， 此方法可縮小線寬到其原先的二分之ㄧ甚或更小的尺寸。 在這個研究裡， 我們成功的製作完成0.2□m與0.3□m大小的元件閘極長度。 利用這個新方法， 平均的誤差是□23nm並且有89%的誤差是在45nm之內。 第二個方法是利用電子束曝光系統來製作T-型閘極。 我們利用了化學放大型光阻來取代傳統的閘極光阻PMMA/PMMA-MAA。在本研究中,所能達到的最小元件閘極線寬為127nm。 本次實驗使用含有銦含量為0.55的MHEMT元件來驗證這個新製程方法。 其中閘極長度為0.25□m的MHEMT元件其飽和電流為360mA/mm，崩潰電壓為5.1V， 以及其互導係數為760mS/mm (當源極-汲極偏壓等於1.5V時)。 當與傳統閘極光阻PMMA/PMMA-MAA比較時，運用化學放大型光阻所需之曝光時間僅是其所需的1/37倍。 在本論文中所發展的兩種新穎閘極製程方法都可以達到高效率以及高良率。 此兩種製程方法都被推薦作為往後三五高頻元件的閘極提供了極佳的低成本高良率之製作方式。

Two novel methods of fabricating T-gate for III-V semiconductor high frequency devices had been developed in this study. The first method used an I-line stepper and shifting mechanism to shrink the gate length to half or less of its original resolution. In this study, gates with gate length of 0.2□m and 0.3□m had been developed easily using I-line stepper. With this method, the average feature size error was only □23nm and 89% of the error is less than 45nm. For the second method, electron beam lithography system was used to develop T-shaped gate. Instead of PMMA/PMMA-MAA, the traditional resists for T-shaped gate fabrication, the chemical amplified resist was used to increase the throughput of gate processing. A MMEMT device with 0.55 indium content in the channel layer was used for demonstration. The smallest gate length we were able to achieve was 127nm. For a sample with a gate length of 0.25□m, the saturation drain current was 360mA/mm, the breakdown voltage was 5.1V and the transcondutance was 760mS/mm when the source-to-drain bias was 1.5V. Compared to PMMA/PMMA-MAA, the exposure time for chemical amplified resist was 37 times shorter. The proposed new methods in this study both offer better efficiency and good reliability in gate pattern definition. They are recommended for future gate fabrication for III-V semiconductor high frequency devices.