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dc.contributor.author黃昱智en_US
dc.contributor.authorHuang, Yu-Chihen_US
dc.contributor.author鄭晃忠en_US
dc.contributor.authorCheng, Huang-Chungen_US
dc.date.accessioned2014-12-12T02:42:45Z-
dc.date.available2014-12-12T02:42:45Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079711814en_US
dc.identifier.urihttp://hdl.handle.net/11536/75204-
dc.description.abstract本論文提出五種改進金屬導電型阻變式隨機存取記憶體元件之方法,包括有金字塔結構之銅質主動式電極、氧化銅主動式電極、銅鈦合金主動式電極、銅鈦合金氧化物主動式電極以及結合鈍性電極之銅參雜氧化鈦電阻切換層。 研究中提出以氫氧化鉀非等向性蝕刻出金字塔結構之矽基板沉積以金屬銅作為金屬性憶體單元之底電極,並明顯地改善其電阻切換特性。相比於傳統的平面銅電極元件,本金字塔結構電極之樣品達成了1 V/ 0.6V之低編碼/抹除電壓,並具有優異之電阻切換耐力,可以短如1微秒的-5/+3V編碼/抹除脈衝,進行長約2400個切換週期之操作。在本研究中所呈現之優越性能,可以歸因其樣品之金字塔結構電極尖頂具有較高的區域電場,因此生成了較細的導電絲,從而反映出較低的操作電壓以及較好的元件耐力。 其次,為了減少存在於電阻切換層中的含銅量,提出了以氧化銅作為電極之元件。此元件並可得到相較於傳統純銅電極樣品,較佳之可靠度以及較大之記憶窗口。我們推測由於氧化銅電極中被稀釋了的銅含量,導致了銅原子在氧化鈦電阻切換層中的殘留量也相應的減少,因而反映在其相較於無氧化之純銅電極樣品,並具有較低的閉態電流以及較佳之元件耐力。 接下來,我們也提出了以銅鈦合金作為主動式電極之樣品,以稀釋電極層中可釋出之銅離子含量以改善其電性。在實驗中不同的銅鈦比率中,我們發現當銅鈦比降為36:64時,可以達成較佳的電阻切換特性,包括2.3個數量級(102.3)的記憶窗口,及1000個切換週期,將較於純銅電極之對照樣品的1.7個數量級(101.7)的記憶窗口,及400個切換週期明顯具有更高的應用優勢。據推測,由銅鈦合所金構成的電極,能控制其中的銅含量,以影響導電絲的形成及破壞,藉此得以限制導電絲之粗細以降低其因抹除操作而破壞時殘留在電阻切換層中的金屬銅,降低其閉態漏電流並提升其切換壽命。 更進一步地,我們提出了以銅鈦合金及氧化物作為主動式電極之樣品,以期更進一步稀釋電極釋出之銅離子含量以改善其電性。此銅鈦合金氧化物電極樣品,達成了三個數量級(103)的記憶窗口,並具有3000個切換週期之優越性能。據推測,由於銅鈦合所金氧化物可以藉由調控其中金屬銅及氧化亞銅於適當的含量,以至於可以達成比無氧化之銅鈦合金作主動式電極更為優異的元件特性。 另一方面,我們提出了使用銅參雜氧化鈦作為電阻切換層,並結合兩個鈍性鉑電極之阻變式記憶體元件。本元件並達成了低如-0.7V之編碼電壓,以及在1微秒之-5/+3V編碼/抹除脈衝下,具有1000個切換週期的元件耐力,優於傳統之Pt/TiO2/Cu對照元件性能。據推測,由於銅參雜氧化鈦層中的銅元素分佈,讓導電絲之銅離子源更接近其中的鈍性鉑電極,因而能導致其元件在操作時能形成較傳統元件更尖且細之導電絲,也讓此樣品因而能達成較低的編碼電壓。此外,由於此樣品之兩側皆為不具有銅離子源之鈍性鉑電極,因而限制了導電絲的持續成長,並因此減少了在抹除操作時,因導電絲斷裂而會殘留在電阻切換層中的金屬性銅含量,從而達到相比於傳統元件更好之元件耐力。 最後,本論文亦提出了研究總結以及針對未來可著重的研究方向。zh_TW
dc.description.abstractIn this thesis, five methods to enhance the resistive switching characteristic of metallic conductive types RRAM have been proposed, including pyramid-structured copper active electrodes, oxidized copper active electrodes, Cu-Ti alloy active electrodes, oxidized Cu-Ti alloy active electrodes, and Cu-doped TiO2 resistive switching layers with inert electrodes. The pyramid structure fabricated with the potassium hydroxide (KOH) anisotropically etched (100) silicon substrate has been deposited with a copper film as the bottom electrode of the programmable metallization cell (PMC) memory to significantly improve the resistive switching characteristics. As compared with the conventional flat copper electrode, this pyramid-structured electrode exhibited the set/reset voltage as low as 1/0.6 V and superior endurance of 2400 cycles at the set/reset voltages of −5/+3 V for the voltages pulsewidth of 1 μs. The high performance of this PMC could be attributed to high local electrical fields at the tips of the pyramid structure, resulting in the formation of the narrower conductive filaments that facilitate the lower operation voltage and better endurance. In order to reduce the copper content in the resistive switching layers, the RRAM cells with the oxidized copper has been deposited as the electrode. The sample possessed the better stability and larger memory window as compared to the conventional non-oxidized copper electrode ones. It was conjectured that the diluted copper atomic concentrations of the oxidized copper electrodes were favorable to reduce the excess residual copper atoms in the TiO2 layers. Therefore, the oxidized copper electrode samples could exhibited the lower OFF-state current with the larger on/off state current ratio (memory window) of 3 orders (103) and the better endurance as high as 1000 cycles than the conventional non-oxidation copper electrode ones of 1.7 orders and 400 cycles. Furthermore, the programmable metallization cell (PMC) memory devices with Cu-Ti alloy films as the bottom electrodes have been shown to exhibit a larger memory window of 2.3 orders and better endurance of 1000 cycles as compared to the conventional pure copper electrode ones. It was conjectured that the Cu-Ti alloy electrodes could obtain the appropriate amount of copper atoms to format and rupture the conductive filaments in the resistive switching layer. Moreover, the devices with oxidized Cu-Ti alloy bottom electrodes have been also shown to achieve the a superior memory windo as high as 3 orders and endurance of 3000 cycles as compared to conventional pure copper and non-oxidized Cu-Ti alloy electrodes ones. It was conjectured that the oxidized Cu-Ti alloys could control the Cu cations from the Cu and Cu2O to the appropriate amount to achieve the most favorable resistive switching characteristics. In addition, the resistive RRAM cells with Cu-doped TiO2 film between two Pt inert electrodes were produced in this work, and these devices could achieve a lower required programming voltage of –0.7 V and higher endurance of about 1000 cycles at the programming/erasing voltage of –5 V/+3 V for the pulse width of 1 μs, as compared with the conventional Pt/TiO2/Cu ones. It was conjectured that the distribution of Cu sources in the Cu-doped TiO2 (TiO2 : Cu) resistive switching film facilitated the formation of sharp and narrow conductive filaments since the Cu sources were redox more easily to form the filaments. The proposed Pt/TiO2:Cu/Pt sample could thus achieve a lower DC programming voltage than the conventional one. Moreover, it was conjectured that the better endurance of the Pt/TiO2:Cu/Pt sample was due to the lower amount of residual Cu atoms in the TiO2 layer from the ruptured narrower filaments during the erasing process. This was because the increase in the amount of Cu atoms was limited by the inert Pt electrode when there were uniformly distributed Cu sources and there was no Cu electrode. Finally, the summary and conclusions as well as the future prospects for the further research were also proposed.en_US
dc.language.isoen_USen_US
dc.subject記憶體zh_TW
dc.subject金屬氧化物zh_TW
dc.subject電阻式記憶體zh_TW
dc.subject金屬導電橋式記憶體zh_TW
dc.subjectMemoryen_US
dc.subjectMetal oxideen_US
dc.subjectRRAMen_US
dc.subjectCBRAMen_US
dc.title銅基阻變式隨機存取記憶體元件之研究zh_TW
dc.titleStudy on the Copper-Based Resistive Random-Access-Memory (RRAM) Devicesen_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
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