| 標題: | Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor Deposition |
| 作者: | Kuo, Po-Yi Chao, Tien-Sheng Huang, Jyun-Siang Lei, Tan-Fu 電子物理學系 電子工程學系及電子研究所 Department of Electrophysics Department of Electronics Engineering and Institute of Electronics |
| 關鍵字: | Charge retention;endurance;Ge nanocrystals (Ge-NCs);nonvolatile memory;polycrystalline silicon thin-film transistors (poly-Si TFTs);programming/erasing |
| 公開日期: | 1-三月-2009 |
| 摘要: | We have successfully developed and fabricated a poly-Si thin-film transistor (poly-Si TFT) nonvolatile memory using Ge nanocrystals (Ge-NCs) as a charge trapping layer. Process compatibility and memory operation of the device were investigated. The Ge-NC trapping layer was directly deposited by low-pressure chemical vapor deposition at 370 degrees C. Results show that the new poly-Si TFT nonvolatile Ge-NC memory has good programming/erasing efficiency, long charge retention time, and good endurance characteristics. These results show that poly-Si TFT nonvolatile Ge-NC memory is the promising nonvolatile memory candidate for system-on-panel application in the future. |
| URI: | http://dx.doi.org/10.1109/LED.2008.2011145 http://hdl.handle.net/11536/7554 |
| ISSN: | 0741-3106 |
| DOI: | 10.1109/LED.2008.2011145 |
| 期刊: | IEEE ELECTRON DEVICE LETTERS |
| Volume: | 30 |
| Issue: | 3 |
| 起始頁: | 234 |
| 結束頁: | 236 |
| 顯示於類別: | 期刊論文 |

