在(111)晶面基板上利用區域性應力通道提高電子遷移率之n型金氧半場效電晶體

Abstract

在本篇論文中，我們研究了在(111)矽基板上利用區域性應力通道來提升電子遷移率的技術。我們在元件上覆蓋一層SiN薄膜，或者改變閘極為非晶矽及複晶矽的堆疊結構，兩種方式皆能造成通道內應力的改變，而提升電子遷移率。閘極堆疊的結構對於元件的起始電壓及閘極內的片電阻都有影響。SiN薄膜則會對氧化層/矽基板的介面造成損害而產生一些介面狀態。此外我們也比較了在(100)與(111)兩種矽基板上，應力對通道造成的應變大小。除了同時擁有SiN薄膜及堆疊閘極結構的元件之外，兩種矽基板上的趨勢大致相同。雖然仍然有許多挑戰，不過相信在(111)矽基板上形成應力通道的技術將可用在未來的CMOS的元件技術中。

In this thesis, we investigate the local strain channel technique using deposition of SiN layer and stack of a-Si gate structure used in the (111) substrate. The device performance is improved due to the mechanical stress produced by thicker SiN capping layer or a-Si layer. Stack of a-Si gate structure also influences the threshold voltage and sheet resistance of gate because of its poly depletion width. SiN capping layer causes more interface states in oxide / Si interface and serious short channel effect. We also compare the strain effect on (100) and (111) substrate in this thesis. The trends are almost the same except the structure with both a-Si layer and SiN capping layer. Although there are still some challenges, the local strain channel technique used in (111) substrate will be useful to CMOS technology in the future.