Study on the reliability of pMOSFETs with different nitrogen and fluorine implantation dosages

Abstract

隨著金氧半場效應電晶體尺寸持續的縮小，超薄氧化層在半導體發展的過程上，扮演著重要的角色。此論文研究不同位置和不同劑量的氮、氟離子佈植在pMOSETs上之電特性及因負偏壓溫度的不穩定性造成元件可靠性的下降。 首先，發現了一個重要的現象，當在汲極╱源極延伸區域上佈植氮離子時，在退火過程期間，氮會阻止硼往通道介面的擴散，使得介面變的更陡峭，減小短通道效應。若將氟離子佈離進入矽基板上，能夠增加通道的轉移電導。其原因是氟離子造成汲極╱源極上的片電阻值變小，使得轉移電導變大。 在可靠性方面，我們著重在氮佈植對於起始電壓漂移的影響。其結果表示氮離子在矽╱矽氧化層的介面上，會降低活化能，減小元件對於負偏壓溫度不穩定性應力的抵抗力。為了改善此情況，我們在閘極上佈植適當劑量的氮、氟離子。根據結果顯示，這個方法的確可以的改善元件的可靠性。綜合上述，雖然在電性上有些佈植對於元件有好處，但在可靠性上反而造成不好的影響，因此，在元件製造過程中必需最佳化，使元件能發揮最大的效能。

With the dimensions of MOSFET devices continue to shrink, the reliability of ultra-thin oxide plays an important role in the development of semiconductor devices. In this thesis, we have investigated the electrical characteristics and degradation of device reliability due to Negative Bias Temperature Instability (NBTI) of pMOSFETs with different dosages of nitrogen and fluorine implanting into different regions of devices. We found that when nitrogens were implanted into source/drain extension regions, nitrogen will retard boron diffusion into channel surface during annealing process, let interface become more steep lateral abruptness and reduce short channel effect. On the other hand, fluorine implanted into silicon substrate will enhance channel transconductance. This is because nitrogen reduces the sheet resistance in source/drain regions and has large transconductance. Regarding reliability issues of devices, we focus on the effect of nitrogen implantation on the shift of threshold voltage. The result indicates that nitrogen on Si/SiO2 interface reduces active energy and decreases the immunity for NBTI stress. In order to improve this situation, we implanted applicable dosages of nitrogen and fluorine into the gate. In according to the result, this method improves devices’ reliability indeed. We found that although implantations such as nitrogen would benefit for devices’ performance, it may cause degradation of reliability such as NBTI for pMOSFETs. Therefore, ion implantations for pMOSFETs need to trade-off for obtaining the optimized devices’ performance.