智慧型計算在低雜訊放大器積體電路設計最佳化應用之研究

Abstract

低雜訊放大器電路在射頻積體電路通訊接收器中扮演重要的角 色，積體電路設計與晶片實現過程中，設計者必須使用電路模擬軟體 進行一系列的功能測試與特性分析，使得設計與製造的積體電路達到 各項要求。為了獲得有效的主動元件等校電路模型，準確的被動元件 參數、經濟的操作環境變數以及最佳的積體電路佈局線寛設計，工程 師必須反覆不斷的調整係數與執行電路模擬，才能找出一組可行解， 達到想要的設計結果。電路設計者往往是憑藉多年累積的經驗去完成 複雜的電路設計與晶片實現。 本論文運用智慧型計算技術進行低雜訊放大器積體電路設計最 佳化之研究。藉由整合基因演算法、李文伯格-馬奎特法 (Levenberg - Marquardt) 以及電路模擬器，吾人成功地運用此智慧型計算技術完成 低雜訊放大器積體電路設計自動化與特性最佳化。對於一個給定的低 vi 雜訊放大器積體電路，在同時考量四個微波S 參數 (S11, S12, S21, and S22) 、穩定指數、雜訊指數以及三階輸入調變失真等七個指標性的電 氣規格之下，首先讀入電路模擬所需的參數，呼叫電路模擬器進行電 路模擬與結果評分，若評分結果同時滿足給定之七個規格，則輸出最 佳參數組，不然則啟動基因演算法進行全域參數搜尋，同時李文伯格 -馬奎特法會針對基因演算法找出的全域解找出附近的最佳解，並重 新回去呼叫電路模擬器進行電路模擬與結果評分，直到結果滿足規 格。在此自動化求解的演化期間，基因演算法所得之適應性分數及李 文伯格-馬奎特法所算出的數值解，都是藉由呼叫電路模擬器針對欲 設計之低雜訊放大器積體電路直接進行模擬所產生。 應用此電腦輔助設計雛形系統進行由0.18 微米金屬氧化物半導 體場效應電晶體所組成之低雜訊放大器射頻積體電路設計，吾人可自 動地找出滿足上述七項規範的最佳參數設定。幾個不同的測試結果初 步驗證了此電路設計最佳化方法論之可行性；尤其在高頻積體電路與 無線晶片系統佈局設計之實用與發展上十分具有發展潛力。

The low noise amplifier (LNA) plays an important role in radio frequency (RF) circuit design. In modern integrated circuit (IC) design flow and chip implementation, the designers must perform a series of functional examination and analysis of the characteristics by several circuit simulation tools to match the specification. In order to achieve the specification, the designers must continuously tuning the design coefficients and perform the circuit simulation to get optimized active device model parameters, passive device parameters, circuit layout, and width of wires. This task usually requires the experienced designers to accomplish such complicated work. In this work we propose a hybrid intelligent circuit optimization technique for LNA circuit. This method combines with the genetic algorithm (GA), Levenberg – Marquardt (LM) method, and circuit simulator to perform automatic LNA circuit optimization. For a given LNA circuit, the optimization method considers the electrical specification such as S11, S12, S21, S22, K factor, the noise figure, and the viii input third-order intercept point. The optimization procedure starts with loading the necessary parameters for circuit simulation, and then calls the circuit simulator for circuit simulation and evaluation. Once the specification is achieved, then output the optimized parameters; otherwise activates the GA for global optimization, mean while the LM method searches the local optima obtained by GA speedy, and then calls circuit simulator to obtain result and evaluates results until the specification is matched. During the optimization process, the fitness function of GA and the optimized result obtained by LM method are generated by applying the circuit simulator to simulate the designed LNA circuit. According to the concept described above, we successfully developed a prototype of the hybrid intelligent IC optimization computer aided design (CAD) system. In the experiment, sixteen optimized parameters of the LNA circuit composed with 0.18 μm metal-oxide-silicon filed effect transistors (MOSFETs) are acquired by our developed system and the seven specifications are all matched. Through this examination, the proposed circuit optimization method shows its robustness and practicability on RF circuit and wireless system on chip (SoC) design.