快閃記憶體元件抹寫週期可靠度與溫度之關係

Abstract

本篇論文主要探討快閃記憶體元件抹寫週期可靠度與溫度之關係，在不同溫度下經過3千次寫入抹除循環後所產生的氧化層捕獲電荷差異之比較，我們可以透過新理論區分氧化層捕獲電荷和浮動閘極電荷調變的影響來給予分析。經過3千次寫入抹除循環後，起始電壓（Vt）改變及次臨界擺幅大幅退化。透過實驗數據研究浮動閘極電荷量的調變，Vmid的變化以及次臨界擺幅的退化的機制，接著發現隨著寫入後抹除循環次數增加 ，表面能態增加及靠近矽表面處的氧化層電洞陷阱的形成增多在高溫情況下更為明顯。因此，我們假設了幾個模型對應於氧化層內的正電荷及負電荷之分析。顯然，正電荷的密度度及等效電荷中心的分佈會因為不同的溫度而有所改變。

In this thesis, we investigate endurance characteristic for 3K cycles in NAND-Flash memory device by using new method to extract the amount of floating (FG) charge (QFG) apart from oxide trapped charge (QOX) generated by program and erase (P/E) cycles in different temperature. After endurance, the Vt shift and substhreshold swing degradation occurred. So in this work, the FG charge modulation, Vmid shift and subthreshold swing degradation mechanism are investigated by examining the measurement data and found that the surface states increase depend on higher temperature and buildup of hole trap near to Si surface by cycling is larger as higher temperature. Therefore, we assume some possible models to analyze the profile of positive and negative charge separately across the oxide in detail. It is demonstrated that the density and distribution of positive charge centroid modulation have dependence on temperature.