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dc.contributor.authorYu, Guo-Shiuanen_US
dc.contributor.authorChang, Tian Sheuanen_US
dc.date.accessioned2014-12-08T15:10:00Z-
dc.date.available2014-12-08T15:10:00Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-1221-1en_US
dc.identifier.issn1520-6130en_US
dc.identifier.urihttp://hdl.handle.net/11536/7634-
dc.identifier.urihttp://dx.doi.org/10.1109/SIPS.2007.4387599en_US
dc.description.abstractLong initial access cycles of SDRAM are the major performance burden of motion compensation in a video decoder. To minimize its effect while improve overall available memory bandwidth, this paper presents an optimal data mapping scheme for motion compensation in H.264 video coding. This scheme allocates the video data into suitable address and bank according to the access characteristics of SDRAM access and address transition in motion compensation. The resulted allocation can reduce the required bandwidth of motion compensation by 36% when compared to the previous design for 525SD video sequences.en_US
dc.language.isoen_USen_US
dc.titleOptimal data mapping for motion compensation in H.264 video decodingen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/SIPS.2007.4387599en_US
dc.identifier.journal2007 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS, VOLS 1 AND 2en_US
dc.citation.spage505en_US
dc.citation.epage508en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000255189800093-
Appears in Collections:Conferences Paper


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