氮化矽快閃記憶體的電荷傳輸模擬及其對抹除操作下之暫態行為的影響

Abstract

SONOS快閃記憶體在寫入/抹除方面已經有相當多的研究，但對於其抹除操作而言，仍有兩個具有爭議的問題：其ㄧ是在抹除操作下的主要物理機制仍未明朗，其二是隨著時間拉長、抹除操作電壓提高，臨界電壓在最後會不降反升，甚至會有一個反轉回去的現象。 本篇論文建立一個較完整的一維模型，除了可成功模擬出SONOS元件在抹除操作下電子與電洞的暫態行為，解釋在抹除操作下的物理機制與底部氧化層厚度有很大的關係，更可以模擬出SONOS元件在抹除操作下最後臨界電壓會反轉回去的情形，並利用模擬結果反推發生此情形可能的原因，是因為電子會堆積在接近儲存層/阻擋層的接面，近而影響到阻擋層的電場，並造成臨界電壓反轉。最後我們更比較在不同條件下此現象的變化，例如改變不同的儲存層厚度與電子在缺陷間的跳動速率。

There are many studies about program/erase in SONOS flash memory, but there are two controversial issues of erase operation. One is the dominant mechanism in erase operation; another one is physics mechanism about the anomalous turn around behavior in erase transient. In this thesis, we establish a more complete model and it can be used to investigate the charge transport and charge capture/emission in the nitride layer. We can use this model to simulate the electron and hole transport properties in erase operation and we show that which type of carrier will dominate is depend on bottom oxide thickness. We also reproduced the turn-around behavior in erase transient and we explain the reason for the turn-around behavior. The charge built up near the top oxide interface/nitride. Therefore, it will affect the top oxide electric field and caused the abnormal behavior. Finally, we analyze this phenomenon in different conditions, such as different hopping rate and bottom oxide thickness.