標題: 高可靠度特性的過渡金屬氧化物電阻式記憶體製作與特性研究
Fabrication and Characterization of Transition Metal Oxide Based Resistive Switching Memory with High Reliability
作者: 黃駿揚
Huang, Chun-Yang
曾俊元
Tseng, Tseung-Yuen
電子工程學系 電子研究所
關鍵字: 可靠度;耐操度;雙層結構;電阻式記憶體;透明;reliability;endurance;bilayer;RRAM;transparent
公開日期: 2014
摘要: 在本論文中,我們探討了以過渡金屬氧化物(transition metal oxide: TMO)作為電阻式記憶體(resistive switching random access memory: RRAM)的可靠度提升研究。在論文的第一部分中,由於二氧化鉿薄膜的結晶溫度低於400度,因此在針對二氧化鉿薄膜退火處理後,會有結晶相產生,且此結晶相會導致二氧化鉿電阻式記憶體嚴重的電阻式記憶體高、低電阻阻態(high resistance state: HRS; low resistance state: LRS)的記憶體特性均勻度與可靠度問題。未解決此問題,我們利用原子層沉積系統(atomic layer deposition: ALD)成長一系列由二氧化鉿與三氧化二鋁一層一層堆疊結構的薄膜(HfxAlyO)來製作成電阻式記憶體。研究結果顯示,我們可以利用原子層沉積系統來將三氧化二鋁嵌入二氧化鉿薄膜中,並且能提升二氧化鉿薄膜的結晶溫度,提升電阻式記憶體的可靠度特性。此外,我們亦可利用原子層沉積系統沉積不同的二氧化鉿與三氧化二鋁比例的薄膜來調變形成電壓(forming voltage)的大小。 在本論文的第二部分,我們製作了二氧化鋯與二氧化鉿雙層薄膜結構的電阻式記憶體。不同於一般單層結構的元件,本雙層結構元件出現了兩段式形成過程的現象(double forming process phenomenon)。我們利用導電燈絲模型(conductive filament model)與能帶圖(energy band diagram)的概念來解釋此兩段式形成過程的現象。由於此元件於退火處理後會在二氧化鉿與底電極氮化鈦之間生成一層氮氧化鈦(TiON)介面層(interfacial layer),在執行形成過程時,此氮氧化鈦介面層會在當元件施加一負偏壓時形成一層穿隧障礙(tunneling barrier),反之當元件施加一正偏壓時,此氮氧化鈦介面層會產生崩潰(breakdown)。因此,由於此兩段式形成過程的產生,我們可以控制導電燈絲形成與斷裂(formation and rupture)的地方侷限在二氧化鉿與二氧化鋯介面當中,此可以避免氧離子於電阻轉態操作時經由電極逸失而消耗的現象,提升電阻式記憶體耐操度(endurance)的穩定性。 此外,根據本論文第二部分所得到抑制氧離子的逸失能改善其耐操度的特性,我們製作了具高密度與高密集陣列特性的鎵摻雜氧化鋅奈米線(Ga doped ZnO nanorods: GZO),並利用此致密的奈米線當作電阻轉態的薄膜來製作電阻式記憶體元件。此鎵摻雜氧化鋅奈米線薄膜具有高度的優選晶相,此優選晶相能限制氧離子沿著該晶界(grain boundary)移動,進而控制導電燈絲的生成方向。此外,此氧化鋅奈米線薄膜能限制導電燈絲的產生與斷裂在氧化鋅奈米線與氧化鋅晶種層的界面中,減少電阻轉態操作中,電阻阻態的變異性,提升元件的可靠度。另一方面,由於氧化鋅為透明介電材料,因此本元件結構具有高穿透率的特性,可望作為未來透明電阻式記憶體元件的應用。
In this thesis, the improvement of reliability in transition metal oxide (TMO) based resistive switching random access memory (RRAM) device was investigated. In the first part, we discussed the thermal stability of HfO2 RRAM device after annealing process. Due to the low crystallization temperature (<400 oC) in the HfO2 RRAM device, it shows wider variations in both high resistance state (HRS) and low resistance state (LRS). Therefore, we use the atomic layer deposition (ALD) system to grow a series of complex HfO2/Al2O3 layer by layer thin film (HfxAlyO) for RRAM device. The experimental results show that the crystallization temperature and forming voltage of HfO2 based RRAM devices can be modulated by changing the number of Al2O3 layers in HfO2 film during ALD deposition. Besides, compared with pure HfO2 device, the Hf0.7Al0.3O devices shows a significant improvement in resistive switching properties. In the second part, we fabricated the ZrO2/HfO2 bilayer RRAM device for large endurance property. The bilayer structure shows the double forming process phenomenon. We explain the phenomenon by using conductive filament model and energy band diagram. A TiON interfacial layer is formed between HfO2 layer and TiN bottom electrode, which will be a tunneling barrier during the first forming process when a negative voltage applied on the device, while it will breakdown when applying a positive voltage. Besides, due to the double forming process, the point for formation and rupture of the conductive filament can be confined at the interface between HfO2 and ZrO2. It can suppress the consumption of oxygen ions during endurance test. It solved the problem of oxygen ions will release from electrode during resistance switching. Therefore, this ZrO2/HfO2 bilayer RRAM device can improve the reliability property especially in endurance characteristic. In addition, based on the concept of suppressing the consumption of oxygen ions in the second part, we fabricated the well aligned and extremely dense Ga doped ZnO nanorods (GZO) structure. The GZO nanorods can be used as a thin film with highly preferred orientation for RRAM device. Therefore, the oxygen vacancies can be confined and migrate along grain boundaries in the GZO nanorod film. Hence, the weakest point for formation and rupture of conductive filament can be limited at the interface between GZO nanorod film and ZnO seeding layer. A significant improvement in endurance reliability is demonstrated in the GZO nanorod device. On the other hand, the GZO RRAM device shows fully transparent property and it is a good candidate for future transparent RRAM application.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079811817
http://hdl.handle.net/11536/76408
顯示於類別:畢業論文