原子層沉積雙層電阻式記憶體之電極效應與元件微縮

Abstract

我們生活在一個資訊爆炸的時代，雲端、移動互聯網技術引發對於大型數據中心强烈的需求。無論是商用還是個人消費性電子的應用場域，非揮發性儲存元件皆存在著廣闊而持久的市場，用以滿足人類指數增長的知識儲存。也因此記憶體元件的研究在各個主要的半導體技術研發單位如火如荼的進行，各種新技術輪番登上舞臺。 如今對於數據中心級的資料儲存主要還是由基於磁儲存的硬碟(HDD)來進行，最近幾年固態硬碟(SSD)技術上的進步和大規模商用帶來的價格下跌，讓一些對速度需求强烈和價格相對不敏感的關鍵系統節點，也開始部署固態硬碟爲主的存儲服務器。近年來各大廠商主推的三維垂直快閃記憶體技術(3D vertical-NAND)技術又讓以快閃記憶體器件為基礎的非揮發性儲存元件的發展進入快速增長的時代。 然而快閃式記憶體有著它固有的缺點：切換速度慢(>1μs)、操作電壓大(>10V)、生命周期短(<106 cycles)、元件尺寸的微縮(scaling)難度高(>15nm)。因此，超越主流NAND 技術的下一代記憶體研究正蓬勃發展，其中電阻式隨機存取記憶體(RRAM)由于其簡單的結構：金屬-絕緣層-金屬(MIM)、切換時間快速(<10ns)、微縮能力好(<10nm)而受到很大關注，並且已經利用與3D-VNAND 相同的三維結構(3D-V-RRAM)成功演示可以操作的元件雛形。 此論文研究以原子層沉積(ALD)技術製造的HfO2/TiO¬2雙層RRAM(Bilayer-RRAM)元件為基礎，替換不同的上電極，找到適應不同需求的上電極材料，探討了電極材料的物理性質對於最終元件電性的影響，並利用波形產生量測一體模組(WGFMU)設計和改進了Bilayer-RRAM 的脈衝行爲量測方法。 另外，本論文也針對使用鎳電極和鋁摻雜技術的ALD Bilayer RRAM 持續進行了微縮，藉由元件製程參數的最佳化，Ni-ALD bilayer RRAM 成爲目前利用非燈絲切換機制的元件中，厚度最薄(6nm)、操作電壓小(<3V)、操作容忍度 (Endurance) 较好的元件（>107）。這令它有機會成爲未來電子神經突觸(synaptic)與儲存級記憶體(SCM)的基礎元件。 此文中也針對非燈絲切換機制元件提出了未來之發展建議。

Abstract We are living in an era of information explosion. The development of cloud storage/ computing and mobile internet drives the strong demand for more powerful data center facilities. The strong demand on increasing storage ability indicates the market of nonvolatile memory is permanent and broad, no matter based on commercial or personal users’ requirements. Because the knowledge that human being creating is growing in an exponential speed. The demand of more powerful and affordable memory device stimulated the active research of new generation memory device in the world. At present time, mass data storage in data centers still strongly relies on HDD, thanks to its high reliability and cheap price. In recent years, because of the considerable technology improvement on SSD and its significant cost reduction after successfully commercialization, some performance-sensitive critical system nodes start deploying the SSD technology. Recent advances of 3D-VNAND spearheaded by Samsung, intel, and Toshiba become another hot technology. The research on memory device is in an unprecedented progress. However, NAND has its inherent shortcomings: long access time(>1μs), large operational voltage(>10V), poor endurance (<106 cycles), device scaling limitation(>15nm). All of these generate significant interests on the development of next-generation nonvolatile memory. Among the numerous new-generation nonvolatile memory technologies, resistive random access memory gradually emerges as the most promising one because of its simple structure (metal-insulator-metal), fast switching speed(<10ns), excellent potential for future scaling(<10nm). Furthermore, a 3D VRRAM structure, which could be a serious contender of 3D-VNAND, has been demonstrated. In this thesis, based on Atomic Layer Deposition(ALD) process, HfO2/TiO2 bilayer RRAM devices were successfully fabricated. The top electrode was found to be a critical knob for tuning device electrical properties. Different work functions and reactiveness of metals were considered to find a suitable top electrode material. In addition, comprehensive measurement protocols of pulse measurements were established using waveform generator/fast measurement unit(WGFMU). Based on the Ni electrode and Al doped TiO2 film, the scalability of ALD bilayer RRAM was investigated. The process optimization improves many aspects of our ultra-thin ALD bilayer RRAM device based on non-filamentary switching mechanism, including the thinnest oxide layer (6nm), small operation voltage(<3V), good endurance (>107 cycles). This work shows the proposed device is a suitable device for analog synaptic devices or storage class memory application. Future development directions are also presented in this thesis.