標題: | 一個超低電壓抗錯有限脈衝濾波器 An Ultra-Low Voltage Error-Resilient FIR Filter |
作者: | 羅其偉 Lo, Chi-Wei 楊家驤 Yang, Chia-Hsiang 電子工程學系 電子研究所 |
關鍵字: | 錯誤偵測與修復;極低電壓;史密特觸發邏輯;Error detection and correction;Ultra-low voltage;Schmitt-trigger logic |
公開日期: | 2014 |
摘要: | 本論文基於連續性運算時間借用(Successive time-borrowing),提出一新的時序錯誤偵測與修正(Error detection and correction) 的方式。不同於以往的方法, 此方式可被整合至現有的晶片設計流程中,而不需要額外的全客戶設計元件。另外,此方法不會有
最短路徑限制,因此不需要額外的緩衝器和控制器來防止錯誤和訊號競逐,進而降低功率與面積的額外付出。由於製程變異在低電壓區域會更為嚴重,為了展現此方法的效能,我們設計一操作在超低電壓的有限脈衝響應濾波器(FIR filter)。藉由自行設計史密特觸發元件(Schmitt-trigger cell),讓晶片可以操作在極低電壓下,使用的製程為90nm。模擬結果顯示此方法確實可讓晶片操作在較高的頻率。 This thesis presents an error detection and correction (EDAC) scheme based on successive time-borrowing. Unlike previous work, this approach can be easily integrated with current cell-based design flow without creating full-custom cells. Moreover, it will not have short-path constraints to prevent early-transition signal from flagging as errors. Thus, delay buffers or duty-cycle controllers are not needed, reducing power and area overhead. To demonstrate the error-resiliency at ultra-low voltage region, we implemented a finite impulse response (FIR) filter with customized Schmitt-trigger cells in 90nm CMOS process. The simulation results show that the design with success time-borrowing can operate with higher frequency compared with baseline design. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT070150201 http://hdl.handle.net/11536/76465 |
顯示於類別: | 畢業論文 |