細部繞線之前的一個電阻電感電容串擾界限設計流程

Abstract

以細部繞線之前的一個電阻電感電容串擾界限設計流程，主要是希望能針對大部份的線路組，找到一個只加入最小的保護線段數目，來使每一組線路能找到一個結果滿足其給定的串擾上限的的問題。由於希望能確實做到保護線段數目的最小化，因此整合了有串擾界限考量的軌道分配，並在後續增加了一個表格式保護線段安插演算法，從模擬插入保護線段，再去做實際插入保護線段的動作。與利用線性規劃的方式來處理，此流程可以更準確的確定保護線段數並且能處理較多的線路組。因此本論文的目地就是在建立一套不失效率且考量電阻電感電容串擾的電阻電感電容串擾界限設計流程，使其能在滿足串擾上限下找到盡可能加入最少的安插保護線段。

RLC Noise-Bounded Routing Design Flow Prior to Detailed Routing：the problem to find a flow which there is a minimal area SINO solution that is free of capacitive noise and is under the given inductive noise bound .We plan to construct flow which take performance and RLC crosstalk bound into account. 1. An uniform distribution result of global route . 2. RLC-Bounded Track Assignment algorithm can make a result with capacitive noise free and minimal LSK value. 3. Tabular Shield Insertion algorithm can insert as few shields as possible .We hope to design a flow and algorithm for general case.