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dc.contributor.author黃士哲en_US
dc.contributor.authorShi-Zhe Huangen_US
dc.contributor.author戴亞翔en_US
dc.contributor.authorYa-Hsiang Taien_US
dc.date.accessioned2014-12-12T02:46:23Z-
dc.date.available2014-12-12T02:46:23Z-
dc.date.issued2004en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009224536en_US
dc.identifier.urihttp://hdl.handle.net/11536/76729-
dc.description.abstract本論文主要由統計的觀點探討低溫多晶矽薄膜電晶體的均勻性以及其在應用上的影響。藉由量測來自不同元件佈局圖(device layout)的元件,調整元件與元件之間的距離,以觀察隨著元件距離不同,元件與元件之間的特性的變異性是否隨之改變。最特別的是,我們利用一種被稱為枕木型的元件佈局圖來降低製程變動所造成的影響以觀察宏觀變動的效應,並且發現元件的特性變動確實隨著元件之間的距離增加而改變。zh_TW
dc.description.abstractThis thesis studies the uniformity issue of low temperature poly-silicon thin film transistor (LTPS TFT) with a statistical method. By measuring devices from different device layouts and adjusting the distance between devices, the relationship of device behavior variance with respect to device interval is examined. In particular, we adopt the “crosstie” layout to get rid of the macro variation coming from process control and demonstrate that the device variation actually varies as the device distance increases.en_US
dc.language.isoen_USen_US
dc.subject薄膜電晶體zh_TW
dc.subject低溫多晶矽薄膜電晶體zh_TW
dc.subject元件變異性zh_TW
dc.subject可靠性預測zh_TW
dc.subjectThin film transistoren_US
dc.subjectLow temperature poly-si thin film transistoren_US
dc.subjectdevice variationen_US
dc.subjectreliabilityen_US
dc.title低溫多晶矽薄膜電晶體的均勻度統計性研究zh_TW
dc.titleStatistical Study on the Uniformity Issue of Low Temperature Polycrystalline Silicon Thin Film Transistoren_US
dc.typeThesisen_US
dc.contributor.department光電工程學系zh_TW
Appears in Collections:Thesis


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