Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, Huang-Yu | en_US |
dc.contributor.author | Chang, Yao-Wen | en_US |
dc.date.accessioned | 2014-12-08T15:10:10Z | - |
dc.date.available | 2014-12-08T15:10:10Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.issn | 1531-636X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/7763 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/MCAS.2009.933855 | en_US |
dc.description.abstract | As IC process geometries scale down to the nanometer territory, industry faces severe challenges of manufacturing limitations. To guarantee high yield and reliability, routing for manufacturability and reliability has played a pivotal role in resolution and thus yield enhancement for the imperfect manufacturing process. In this article, we introduce major routing challenges arising from nanometer process, survey key existing techniques for handling the challenges, and provide some future research directions in routing for manufacturability and reliability. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Routing for Manufacturability and Reliability | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/MCAS.2009.933855 | en_US |
dc.identifier.journal | IEEE CIRCUITS AND SYSTEMS MAGAZINE | en_US |
dc.citation.volume | 9 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 20 | en_US |
dc.citation.epage | 31 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000270433000003 | - |
dc.citation.woscount | 1 | - |
Appears in Collections: | Articles |
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