標題: 一個可預測均流程度之改良式斜率控制法應用在並聯電源模組中
A Novel Droop Method with Predictive Current-Sharing Error for Paralleled Power Modules
作者: 何心欣
Hsin-Hsin Ho
陳科宏
陳紹基
Ke-Horng Chen
Sau-Gee Chen
電機學院電子與光電學程
關鍵字: 均流;並聯;斜率控制法;current-sharing;parallelled power modules;droop method
公開日期: 2005
摘要: 在冗餘及分散式的電源系統中,常常會使用多組容量較小的電源模組並聯以提供足夠的功率給負載使用。當多組電源模組並聯操作時,均流技術會使用在系統中使個別模組能平均分配負載電流。 均流技術中的斜率控制法是利用規劃個別模組的輸出阻抗來達到均流之目的。其優點是電路簡單、容易擴充及模組間不需要互相的連接,然而缺點是電流分配的效果不佳。本論文的內容主要是針對傳統控制法的缺點,提出一個可預期均流程度的改良式斜率控制法之電路架構並完成晶片設計。改良後的電路架構中每一組模組會有各自的轉導放大器來偵測輸出電流的變化,並且加上取樣保持電路來取得電感電流平均值之資訊。電流在經過取樣保持電路後,利用電流鏡的傳遞複製出兩組電流,一組直接饋入晶片外的誤差放大器之負端輸入以達成斜率控制法中輸出電流遞增、輸出電壓遞減的特性。另一組電流則送入晶片中輸入電壓自動遞增電路的輸入端,使得個別模組的輸出電壓能隨電流做動態的調整,讓輸出電壓隨輸入電流的下降量維持在系統可接受之變動值內。整體電路使用台積電點五微米CMOS製程來進行模擬與佈局,模擬結果可以驗證使用改良式斜率控制法在並聯系統中,個別電源模組的輸出電流能如預期做分配,均流的效果相較於傳統斜率控制法可以大幅改善。
Paralleling of DC-DC converter modules is the approach that is widely used in redundant and distributed power systems. When operating power modules in parallel, the major concern is the uniform current distribution of each module which is accomplished by the current- sharing method. The droop method is the simplest one among current-sharing methods. It is easy to implement and expand and there is no need for interconnections between the paralleled connected modules. The disadvantage, however, is the poor current-sharing accuracy due to the limited output voltage regulation. In this paper, a novel droop method with the predictive current-sharing error is proposed to overcome drawbacks of the conventional method. In the improved architecture, each module has its own gm amplifier to detect the output current variation and the sample/hold circuit is added to update the output current information of each PWM cycle. Thereafter, the output current is transported to the current mirror and then is reduplicated as two sets of current. One feeds directly to the negative input of the error amplifier outside the chip to achieve voltage droop characteristic; the other feeds to the control circuit inside the chip which automatically compensates the extra output voltage drop due to the steeper slope value of the novel method. The proposed circuit is fabricated in a 0.5-um 2P4M N-Well CMOS process. Consequently, the simulation results verify that the proposed method indeed improves the current-sharing accuracy of the parallel connected module significantly as the same as equations induced in this paper.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009267503
http://hdl.handle.net/11536/77705
顯示於類別:畢業論文