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dc.contributor.author李捷弘en_US
dc.contributor.author吳耀銓en_US
dc.date.accessioned2014-12-12T02:51:21Z-
dc.date.available2014-12-12T02:51:21Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009275525en_US
dc.identifier.urihttp://hdl.handle.net/11536/77970-
dc.description.abstract  隨著半導體元件尺寸微縮至奈米世代,為了達到特定的電晶體性能及通道長度,對於應用在側壁空間層的氮化矽薄膜製造上,面臨了更嚴苛的挑戰。本研究是以應用在65奈米電晶體側壁空間層的氮化矽薄膜特性需求為條件,利用單晶圓低壓化學氣相沈積系統來進行BTBAS氮化矽的薄膜特性研究。   研究中利用田口式實驗設計方法針對主要製程參數進行實驗,取得與薄膜特性之間的製程趨勢資料。接著從其中依據65奈米所需的薄膜特性條件篩選出兩組製程參數進行進一步的薄膜特性及圖案負載效應的驗證。   驗證結果顯示,兩組製程參數所沈積得到的氮化矽薄膜特性,都如預期的滿足了65奈米所需的薄膜特性條件。在圖案負載效應的驗證中,由於較低的製程壓力設定,也得到了顯著的改善。   配合單晶圓低壓化學氣相沈積系統所提供的薄膜特性可調能力,加上具有較低沈積溫度能力的BTBAS矽先驅物質,其沈積所得的氮化矽薄膜,證實得以滿足65奈米世代對側壁空間層氮化矽薄膜的種種嚴苛要求。zh_TW
dc.description.abstractAs the dimension of semiconductor device keep shrinking to nanometer generation, in order to achieve specific transistor performance and channel length, the manufacture of silicon nitride thin film which is used for sidewall spacer application is facing more difficult challenge. This study use the requirement of the silicon nitride thin film property which is used for 65nm transistor sidewall spacer application as the criteria, then use the single wafer low pressure chemical vapor deposition system to perform the experiment of the BTBAS silicon nitride thin film property study. The experiment utilizes the Taguchi design of experiment method to collect the data of process trend between the major process parameters and the thin film properties. Then according to the requirement of 65nm thin film properties, we screen out two sets of process parameters for further examination of thin film properties and pattern loading effect. The examination result indicates that these two sets of process parameters can produce the silicon nitride thin film which fulfills all the criteria of 65nm thin film properties as expect. We also obtain obvious improvement in the examination of the pattern loading effect due to lower process pressure setting. The thin film properties tuning capability of the single wafer low pressure chemical vapor deposition system and the lower deposition temperature characteristic of the BTBAS silicon precursor can be proved that can deposit the silicon nitride thin film which can fulfill the difficult requirements of the 65nm sidewall spacer application.en_US
dc.language.isozh_TWen_US
dc.subject低壓化學氣相沈積zh_TW
dc.subject氮化矽zh_TW
dc.subject側壁空間層zh_TW
dc.subject田口式實驗設計方法zh_TW
dc.subjectLPCVDen_US
dc.subjectBTBASen_US
dc.subjectSilicon Nitrideen_US
dc.subjectSidewall Spaceren_US
dc.subjectTaguchi Design of Experimenten_US
dc.title低壓化學氣相沈積之BTBAS氮化矽薄膜在65奈米電晶體側壁空間層之應用(利用田口式實驗設計方法進行製程參數最佳化)zh_TW
dc.titleLPCVD BTBAS Silicon Nitride thin film for 65nm Transistor Sidewall Spacer Applicationen_US
dc.typeThesisen_US
dc.contributor.department工學院半導體材料與製程設備學程zh_TW
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