标题: 不同前处理对氮氧化铪(锆)闸极介电层于锗基板之电物性研究
The Electrical and Physical Properties of Hf(Zr)-oxynitride Gate Dielectrics on Ge Substrates with Various Surface Pretreatments
作者: 林哲弘
Je-Hung Lin
张俊彦
Chun-Yen Chang
电子研究所
关键字: 高介电系数;锗基板;表面前处理;闸极介电层;氮氧化铪;氮氧化锆;high-k;Ge substrate;surface pretreatment;gate dielectric;HfOxNy;ZrOxNy
公开日期: 2005
摘要: 对于四氟化碳和氨气电浆前处理以及二矽乙烷的钝化前处理方法,我们有系统地研究此三种表面前处理对于氮氧化铪以及氮氧化锆闸极介电层在锗基板上之电物性。
我们发现高介电系数材料与锗基板的接面和矽基板的接面有不同热化学的特性;在矽基板与氮氧化锆之间的接面层会因高温处理而成长,并且有助于锆金属矽化物的形成。相反的,在锗基板与氮氧化锆之间的接面层会因高温处理而挥发,并且抑制锆金属锗化物的形成,此外,由于接面层挥发使介电层所产生的局部凹陷现象,亦会损害高介电系数材料/锗基板元件结构的电性。
高介电系数材料/锗基板结构会有很差的热稳定性主要是由于低品质的锗原生氧化层,因此沉积介电质后的热退火处理以及沉积金属电极后的热退火处理就被用来检验白金/高介电系数材料/锗基板电容结构之热稳定性。我们发现沉积介电质后的热退火处理并不会增加锗基板的捕捉缺陷( bulk traps ),而沉积金属电极后的热退火处理却会使其增加。此外,这两种热退火处理都能削减接面载子捕捉密度( Dit )与缩小等效氧化层厚度,但此二种热处理过程却同时增加了闸极漏电流。
四氟化碳电浆前处理会使白金/高介电系数材料/锗基板电容结构中的迟滞宽度与闸极漏电流增大,这很可能是由于接面载子捕捉密度以及表面粗糙度的增加。另一方面,氨气电浆前处理却压缩了迟滞宽度,这应该与较少的氧化锗和接面载子捕捉密度有关,另外,此种氮化过程也能减少氧化锗的成长以及它的挥发,因而改善白金/高介电系数材料/锗基板电容结构的热稳定性。
在摄氏五百五十度下热脱附十分钟以及接下来的二矽乙烷钝化前处理已经成功地消除锗的原生氧化层,因此大大缩小了迟滞的宽度,但是在高频的电容-电压曲线图中,有经过二矽乙烷钝化前处理的试片却呈现出低频的电容-电压特性曲线。然而,这些表面前处理解决了迟滞现象并且改善了白金/高介电系数材料/锗基板电容结构的热稳定性,因此持续最佳化接面特性应能改善电性以及实现锗基板结合高介电系数材料之元件。
We have systematically investigated the electrical and physical properties of HfOxNy and ZrOxNy gate dielectrics on Ge substrates with different surface pretreatments, including CF4 plasma pretreatment, NH3 plasma pretreatment and Si2H6 passivation.
We found that the interfacial layer of high-k/Si and high-k/Ge have distinct thermochemical properties; high temperature processing aided the interfacial layer growth and the formation of Zr–silicate in ZrOx(Ny)/Si gate stack. On the contrary, severe interfacial layer volatilization and the inhibition of Zr–germinate were found in ZrOx(Ny)/Ge system, moreover, the generated localized pits in deposited high-k films owing to the desorption of the interfacial layer might degrade the electrical properties of fabricated high-k/Ge devices.
The poor thermal stability of high-k/Ge gate stacks is due to inherent poor quality of Ge native oxide. Two thermal processes PDA and PMA are included to examine the thermal stability of Pt/high-k/Ge capacitors. We found that the PDA process did not multiply the pre-existing bulk traps in Ge substrate but the PMA process increased them. Furthermore, both annealing processes were found to annihilate the amount of Dit and shrink the CET, but these thermal processed increased the gate leakage current at the same time.
The CF4 plasma pretreatment enlarged the hysteresis width and gate leakage current of Pt/high-k/Ge capacitors, which were possibly due to the increment of Dit and surface roughness. On the other hand, the NH3 plasma pretreatment compressed the hysteresis width, which was related with less GeOx and Dit, moreover, this nitridation process improved the thermal stability of Pt/high-k/Ge capacitors by diminishing the formation of GeOx and their volatilization.
The Ge native oxide was successful eliminated by thermal desorption at 550□C for 10 min and following Si2H6 passivation, which greatly reduced the hysteresis width of Pt/high-k/Ge capacitors, but the high frequency C-V curves of the Si2H6 passivation samples presented a low-frequency-like characteristic. However, those surface pretreatments solved the hysteresis effect and improved the thermal stability of Pt/high-k/Ge capacitors, thus the continuous optimization of the interface properties are expected to improve the electrical characterization and achieve the Ge device in combination with a high-k dielectric.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009311530
http://hdl.handle.net/11536/78002
显示于类别:Thesis


文件中的档案:

  1. 153001.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.