完整後設資料紀錄
DC 欄位語言
dc.contributor.author呂國源en_US
dc.contributor.authorKuo-Yuan Luen_US
dc.contributor.author羅正忠en_US
dc.contributor.authorJen-Chung Louen_US
dc.date.accessioned2014-12-12T02:51:37Z-
dc.date.available2014-12-12T02:51:37Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009311544en_US
dc.identifier.urihttp://hdl.handle.net/11536/78015-
dc.description.abstract隨著系統晶片(SOC)的發展,持續降低互補式金氧半(CMOS)場效電晶體元件中的閘極介電層及非揮發性記憶體(non-volatile memories)中的複晶矽層間介電層(inter-poly dielectric)厚度以提高元件密度及降低操作電壓變得十分重要。但當氧化層厚度小於10奈米時,原本儲存於複晶矽浮停閘內的電荷,很容易因為氧化層中的缺陷,形成漏電流路徑,造成原本儲存資料的流失。於是,新式SONOS結構與奈米點結構記憶體等離散式儲存方式的記憶體被提出,以順應尺寸微縮以及維持好的儲存能力等特性。在本篇論文中,我們利用不同高介電常數材料成功的製作出以奈米點做為補陷電子媒介的記憶體。 首先,我們利用雙電子槍蒸鍍系統將二氧化鐠(PrO2)沉積在試片上,在經由高溫退火使之形成奈米點,以製造出奈米點結構記憶體。藉由這種方法我們可以得到具有低外加偏壓、大記憶窗口、快速寫入/抹除速度、高穩定性的非揮發性記憶體。同時,我們也可以用元件做一個單元儲存兩個位元的操作方式。因此,我們認為,利用二氧化鐠作為奈米點結構記憶體的材料是很有潛力的。 我們亦用雙電子槍蒸鍍系統沉積鑭鋁氧化物(LaAlO3)作為奈米點的材料。在經過量測之後,我們同樣得到相同的結果:低外加偏壓、大記憶窗口、快速寫入/抹除速度、持久資料保存、高穩定性的飛揮發性記憶體。顯示用鑭鋁氧化物作為奈米點結構記憶體是很好的選擇。zh_TW
dc.description.abstractFor the system-on-chip (SOC) application, a continuously scaling of the gate dielectrics for complementary metal oxide semiconductor (CMOS) and inter-poly dielectrics (IPDs) for electrically-erasable programmable read-only-memory (EEPROM) and stacked-gate flash memory is needed to obtain high density and low operation voltage. But when oxide thickness is less than 10 nm, the charge stored in the floating gate forming leakage path easily due to defects in the oxide, thus induces data error. To overcome the limits of the conventional FG structure, other kinds of nonvolatile memories such as SONOS and nanocrystal memories which stored electrons in discrete traps are mostly mentioned, hence several characteristics such as scaling down and good storage maintenance can be reached. In this thesis, we successfully fabricated nanocrystal memory devices by using different high-k materials. First, a praseodymium oxide (PrO2) layer was deposited on the oxide by Dual E-gun Evaporation System with Praseodymium oxide targets. After that, the wafer was subjected to RTA treatment in O2 ambient at 900℃ for 1 minute. When the film is RTA treated to provide enough energy and surface mobility, the thin Praseodymium oxide will self-assemble into nano dot. By using this method, we obtains nonvolatile memory devices with excellent characteristics: low applied voltages, large memory window, high program/erase speed, fine endurance. And, we can use these devices in 2-bit operations. Consequently, we consider, it is potential material as nanocrystal memory devices by using PrO2. A Lanthanum aluminate (LaAlO3) layer was also deposited on the oxide by Dual E-gun Evaporation System with Praseodymium oxide targets. We obtain similar results after our measurements: low applied voltages, large memory window, high program/erase speed, fine endurance. it is potential candidate as nanocrystal memory devices by using LaAlO3.en_US
dc.language.isoen_USen_US
dc.subject快閃記憶體zh_TW
dc.subject奈米點zh_TW
dc.subject二氧化鐠zh_TW
dc.subject三氧化鐳鋁zh_TW
dc.subjectflash memoryen_US
dc.subjectnanocrystalen_US
dc.subjectPrO2en_US
dc.subjectLaAlO3en_US
dc.title次世代低功率快閃記憶體元件之特性與研究zh_TW
dc.titleCharacteristics and Investigation of Next Generation Low Power Flash Memory Devicesen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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