功率元件之不等電位場板終端結構設計

Abstract

複晶矽是一個成熟的材料，其沉積與蝕刻速率穩定且容易整合在一般IC製程上，因此本論文利用複晶矽作為一不等電位場板結合金屬場板應用在終端結構上，以提高元件崩潰電壓。 我們先利用ISE TCAD製程模擬軟體模擬金屬場板終端結構結合複晶矽電阻，證實其崩潰電壓比單一金屬場板結構能大幅提升。實際製作出的單一金屬場板終端結構可耐壓約300伏特，加入了複晶矽電阻，耐壓可提升至2000伏特，漏電流約在微安培等級。由於複晶矽電阻同時連接元件兩端電極，其阻抗是造成漏電流的主要因素。我們將複晶矽電阻開縫隙，使元件電極看到的複晶矽電阻等效寬度變小或等效長度變大，藉此降低漏電流，本論文有同心圓縫隙及螺旋型縫隙兩種結構。 除了改變複晶矽電阻的結構，我們研究如何提高複晶矽電阻的電阻係數以提升總阻抗，複晶矽電阻藉由n型及p型的離子植入加上後續的退火形成許多P-N-N-P結構，自由載子看到的能障變多，所以電阻係數提高，晶粒大小、n型摻雜濃度和後續的退火時間及溫度是影響電阻係數最主要的因素，我們沉積550度的非晶矽、硼磷植入劑量各為1x1013cm-2及2x1013cm-2、能量各為40KeV、120KeV加上後續1000度30分鐘的退火，電阻係數能達到106等級。如沉積溫度較高的複晶矽，我們也能利用先植入氮原子抑制晶粒在後續退火中的成長，電阻係數同樣能達到106等級。

Poly silicon is a mature material. It has stable deposition rate and etching rate and combined on general IC’s process easily. In the thesis we use poly silicon as a non-equal potential field plate in termination structure to increase breakdown voltage. First we execute the simulation of termination structure which combines metal field plate and poly resistor by ISE TCAD simulation and verify that the breakdown voltage of the structure is greater than of metal field plate termination structure. In reality, we fabricate the metal field plate termination structure and its breakdown voltage is 300 V. After adding poly resistor, the breakdown voltage of the termination structure is 2000V and leakage current is in microampere. Because poly resistor connects two electrode of device, its resistance is a key factor of leakage current. We make the effect width shorter and the effect length longer to decrease the leakage current by the seams in the poly-resistor. There are two kinds of seam in our thesis. One shape is spiral and the other is like a concentric circle. Except for changing the structure of the poly resistor, we study that how to increase the resistivity of the poly resistor and its total resistance. There are many P-N-N-P structures to form in the poly resistor by n-type and p-type implantation and annealing. A series P-N-N-P structure is encountered by the free charge carrier. A large resistivity is hence observed. Grain size, n-type doping concentration, annealing time and annealing temperature are the key factor of resistivity. When 550 oC amorphous silicon was deposited, the ion dose of boron and phosphorus are equal to 1x1013cm-2and 2x1013cm-2 at 40KeV and 120KeV, annealing temperature is 1000 oC and annealing time is 30minute, the resistivity of resistor can reach 106 Ω-cm. If 625 oC was deposited, we also could use nitrogen implantation to suppress the growth of the grain in annealing process. Then the resistivity of poly silicon also can reach 106Ω-cm.