1.8伏金氧半低雜訊放大器之設計應用於超寬頻UWB 3.1-10.6GHZ無線接收端

Abstract

本論文研製一個應用於超寬頻3.1-10.6 GHZ的低雜訊放大器。本研究是以0.18微米互補式金氧半製程實現。此低雜訊放大器是以共源極和共閘極疊接為放大器主架構，在共源極電晶體的閘極和源極兩端外加電容，在不增加電晶體的大小下，補足濾波器所需電容值，達到低功率消耗的設計原則，並用一電容與源極電感並聯，能減少源極電感對高頻響應的降低，用三階帶通柴比雪夫濾波器做輸入匹配，而在輸出端是用共汲極電壓緩衝器做匹配，為了能在所應用的頻段內達到相對的平坦增益，在疊接放大器中利用shunt peaking 的方法去實現。供應電壓VDD為1.8伏特時，整個電路功率消耗約為18mW，及包含pad的情況下整個電路大小約為0.992 mm2。本研究的低雜訊放大器所量測的規格，順向增益(S21)在3.1-10.6GHz時為6dB-9.7dB，逆向隔離(S12)為-20dB以下，S11平均為-7dB以下，S22平均為-10dB以下，平均雜訊指數為7dB，而線性度參數IIP3為6dBm。

A low noise amplifier is applied for ultra-wideband. This research is fabricated in 0.18-μm CMOS process. The three-order band-pass Chebyshev filter can reach the broadband input impedance matching. Owing to the low power consideration, plus the additional gate capacitor . The cacoded structure gain stage provides the gain of the amplifier. The capacitor reduces the gain degradation caused by at high frequency. The inductive shunt peaking maintain the gain flatness. Output buffer is used for output broadband matching. The low noise amplifier introduces the shunt peaking to achieve the flat gain purpose. The total power dissipation of the chip is about 18 mW at power supply 1.8 volt. The chip size included pad is 0.992 mm2. The measurement result of this study expect that the forward gain S21 is 6 to 9.7dB at 3.1-10.6GHz, the reverse isolation S12 is under -20dB, the average S11 is under -7 dB, the average S22 is under -10dB, the noise figure minimum is 6dB, and IIP3 is 6dBm.