射頻前端接收器設計

Abstract

本篇論文提出一個 4GHz 到 20GHz 的低雜訊寬頻放大器，和一種新穎被動式混波器。低雜訊寬頻放大器是運用4顆電晶體，接成共源極的架構；利用輸入閘極電感和並聯回授電容，來完成輸入阻抗匹配。整體放大器在工作頻率範圍，功率增益可達22 dB，輸入反射係數低於 -10dB。最後在臺灣基體電路公司下線，使用0.18 微米互補性氧化金屬半導體製程。被動式混波器是一種全新的架構，從未被發表在國際期刊。這個架構沒有直流功率消耗，沒有1 dB 功率抑制點；在沒有慮波器的情形下，輸出中頻的載波和射頻訊號可被有效消除。

This thesis presents a 4GHz to 20GHz low noise amplifier, and a novel architecture of mixer. Low noise amplifier utilizes four MOS transistors which are designed as common-mode source architecture, and apply gate inductor and parallel-feedback capacitor to achieve wide-band input impedance matching. Power gain can be up to 22dB and input reflection coefficient can be lower than -10dB on intended frequency range, and is fabricated in TSMC 0.18μm CMOS technology. The passive mixer is a novel architecture, and is never published on worldwide international papers. This architecture doesn’t consume any DC power and no 1-dB compression issue. Besides, at IF output terminal, LO and RF signals can be effectively eliminated without any filters.