用於UWB設計之Viterbi解碼器

Abstract

本論文提出用於IEEE802.15.3a正交分頻多工基頻錯誤更正編碼電路的設計與實現。我們提出新型的算術比較器(Arithmetic compare-select),此比較器其速度較傳統比較器快約1.4~1.8倍。本論文提出利用算術比較器維特比架構,再配合高效能結構設計,其Throughput可達到規格中最高速480Mb/s。根據IEEE 802.15.3a規格，以迴旋碼1/3為基本的編碼格式，另加上Puncture模組以處理不同的資料傳輸速率。此篇論文也探討了高精度(Soft-Decision)解析度與Viterbi decoder的追溯長度(Traceback-length)對於外部接收器效能的影響與複雜度的最佳化。本論文所完成之soft IP，其code coverage接近100%,經由IP Qualification確認,符合soft IP設計規範。同時,在CMOS.18製程下以SYNOSYS ASTRO完成macro設計。

In this thesis, an IEEE 802.15.3a OFDM-based error correcting design and implementation is presented. With the newly proposed arithmetic compare-select (CS), the newly designed Viterbi decoder present good speed performance. According to IEEE 802.15.3a, the convolutional code 1/3 is the base coding rate. Through the puncture scheme, Viterbi decoder for the 802.15.3a standard can support several data rates. We analyzed the soft decision resolution and traceback-length to get the optimized solution between performance and complexity. The design flow and coding scheme is based on IP qualification. The coding style, code coverage up to 100% and other requirements are considered. Also, the macro design in CMOS.18μm is applied with SYNOPSYS ASTRO