以FPGA為基礎發展永磁同步馬達使用線性型霍爾感測器與無感測控制方法

Abstract

本論文以現場可規劃邏輯閘陣列(Field Programmable Gate Array,FPGA)實現應用於永磁同步馬達的感測與無感測速度控制IC，電路實現方式採用階層式、模組化的設計方式，降低其複雜度，並以電路並用的概念，降低邏輯閘數量，達到最佳化的目的。弦波型永磁同步馬達的控制方法，包括使用線性型霍爾感測器之速度控制架構，以及以定子磁通估測為基礎之無感測速度控制。首先利用線性型霍爾感測器訊號做為轉子位置之參考，達到磁場導向控制的目的。另一方面，無感測演算法以磁通鏈增量與正規化的反抗電動勢函數估測轉子角度變化量。此無感測演算法對於因數位化處理的量化誤差，以及回授訊號的雜訊所造的轉子角度估測誤差具有內迴路的自動修正機制。數學分析與電腦模擬驗證了此方法的強健性。然而，馬達參數的變異，以及回授訊號的不準確仍會導致估測誤差，對此本論文亦呈現分析與模擬之結果。根據這個以定子磁通估測為基礎的方法，本論文提出一種新型的演算法，此新型演算法加入了估測反抗電動勢峰值為另一個參數，藉由調整其比重能得到較原演算法為佳的估測性能。所設計之數位電路，藉由ModelSim/Simulink/PSIM軟體進行系統整合模擬，並分析取樣頻率對轉速估測之影響，以期所設計的控制系統能達到快速與精確的速度響應。本論文所設計的IC具有可程式化的特點，且透過JTAG下載線可觀測控制IC內各個參數及變數。實驗結果驗證了使用線性型霍爾感測器以及無感測控制方法的可行性與性能。

This thesis presents the design and implementation of a sensors or sensorless speed control IC for permanent magnet synchronous motors (PMSMs). By using the hierarchical and modular realization strategy, the designed circuit can be re-used to reduce the design complexity and the total gate counts for optimum design. Two methodologies are presented: 1) a speed control architecture employing linear Hall effect sensors, and 2) a sensorless speed control scheme with a flux-based rotor position estimation algorithm. By using linear Hall effect sensors, the rotor position information can be obtained, and flux-oriented control (FOC) is achieved. On the other hand, the sensorless algorithm uses the incremental values of flux linkage and the normalized back-EMF functions to estimate incremental rotor position. An internal closed-loop correction mechanism within this algorithm can correct rotor position estimation drift, which could due to quantization error of digital processing or measurement noise. Mathematical analyses and numerical simulations demonstrate robustness of this sensorless algorithm. However, motor parameter variations and measurement inaccuracies still introduce rotor position estimation error. Sensitivity analyses to motor parameters and measured signals are also presented. According to this flux-based sensorless approach, a new algorithm is proposed. The estimated back-EMF peak value is involved in the new algorithm as an additional parameter. By tuning the weighting of the new parameter, better performance than the original algorithm’s can be obtained. By using ModelSim/Simulink/PSIM, the system-level simulation can be achieved and the influence of sampling rate on speed error is also presented. All registers in the proposed control IC can be observed via the JTAG download cable. An experimental platform has been constructed and results are given for verification.