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dc.contributor.author張紹宣en_US
dc.contributor.authorShao-Hsuan Changen_US
dc.contributor.author闕河鳴en_US
dc.date.accessioned2014-12-12T02:53:18Z-
dc.date.available2014-12-12T02:53:18Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009313612en_US
dc.identifier.urihttp://hdl.handle.net/11536/78425-
dc.description.abstract現在的生活裡,有著越來越多的行動式系統像是行動電話、MP3播放器、PDA、以及攜帶式電子遊樂器,其功能與複雜度都較過去上升。因此,對於行動式系統來說大量的多媒體運算能力是必須的,而若是使用傳統的硬體架構來執行這些運算,會因為架構上沒有很好的對應到多媒體檔案的特性,沒辦法很有效率的對多媒體檔案作存取,會使得運算效能低落,最糟糕的是無法達到及時的需求。本論文,為參考史丹佛大學所提出的串流處理器架構,設計了對應多媒體特性的運算單元以提供所需運算能力,除此之外,在考量到了未來使用上的便利性,以及能快速與真實的多媒體應用接軌,將此運算單元加上設計的介面電路後使之成為能與AMBA相容的矽智產,如此便能在ARM的平台上,利用其他現成的矽智產或是週邊,真實的將此設計變成多媒體運算所需要的硬體加速器。本論文以軟式矽智產完成,並且經過ARM系列的基板驗證過所設計的介面電路,確定了所設計的介面電路是符合AMBA規定的電路。zh_TW
dc.description.abstractThere are more and more portable systems such as mobiles, MP3 player, PDA, and other entertainment systems in today’s life. The functionality and complexity of them thus increase much higher than old-time ones. Therefore, having a great deal ability of multimedia operation is important for portable systems. However, it is tough to have enough amounts of multimedia operations from conventional hardware architecture. This results from the poor match between conventional architecture and features of media applications. It hence leads to inefficient memory access that induces performance degression. The worst case is unable to meet the real time requirement. According, this thesis designs an operational unit, ALU cluster, that is referenced from Stanford’s stream processor architecture and thus matches to media applications to provide necessary processing requirements for media applications. Besides, considering the issues of convenient usage in the future and rapid integration of real multimedia applications, we wrap ALU cluster as an AMBA-compatible IP by adding designed interface. Then, it is possible to exploit other existing IP and peripherals in the AMBA platform and truly treats our design as hardware accelerator for real multimedia applications. This thesis is finished with a synthesizable soft IP. The designed interface is verified by ARM-series baseboard. This ensures that the interface conforms to AMBA specification.en_US
dc.language.isoen_USen_US
dc.subject矽智產zh_TW
dc.subject可重組式硬體加速器zh_TW
dc.subject多媒體串流處理zh_TW
dc.subjectALU clusteren_US
dc.subjectIPen_US
dc.subjectReconfigurableen_US
dc.subjectstream processoren_US
dc.title應用於多媒體串流處理之可重組式運算單元硬體加速矽智產設計zh_TW
dc.titleDesign and Implementation of an ALU Cluster Intellectual Property as a Reconfigurable Hardware Accelerator for Media Streaming Architectureen_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
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