Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lin, Chun-Yu | en_US |
dc.contributor.author | Ker, Ming-Dou | en_US |
dc.date.accessioned | 2014-12-08T15:02:04Z | - |
dc.date.available | 2014-12-08T15:02:04Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.isbn | 978-1-4244-2039-1 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/785 | - |
dc.description.abstract | Low capacitance (low-C) design on ESD protection device is a solution to mitigate the radio-frequency (RF) performance degradation caused by electrostatic discharge (ESD) protection device. Silicon-controlled rectifier (SCR) device has been used as an effective on-chip ESD protection device in RF ICs due to the smaller layout area and small parasitic capacitance under the same ESD robustness. In this paper, the modified lateral SCR (MLSCR) realized in waffle layout structure is studied to minimize the parasitic capacitance and the variation of the parasitic capacitance within ultra-wide band (UWB) frequencies. With the minimized parasitic capacitance, the degradation on RF circuit performance due to ESD protection devices can be reduced. The waffle MLSCR with low parasitic capacitance is suitable for on-chip ESD protection in UWB RF ICs. Besides, the turn-on speed of MLSCR with waffle layout structure is verified to be better than that with conventional stripe structure. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Optimization on SCR device with low capacitance for on-chip ESD protection in UWB RF circuits | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | IPFA 2008: PROCEEDINGS OF THE 15TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS | en_US |
dc.citation.spage | 58 | en_US |
dc.citation.epage | 61 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000259140300013 | - |
Appears in Collections: | Conferences Paper |