錫鉛焊錫接點在覆晶厚膜鎳/銅UBM結構上之電遷移

Abstract

覆晶封裝是目前在IC元件上的重要封裝之一。隨著電流密度的增加，銲錫接點的可靠度，已經成為重要的議題。元件的設計規則上，每個銲錫接點所承受的電流介於0.2到0.5A，而同時電流密度則以達103~104A/cm2，已經可導致電遷移發生。但目前仍鮮有關於厚膜(Ni/Cu)UBM的研究。在此研究中，利用厚膜結構的(電鍍Ni 3µm/Cu 5µm)作為UBM，銲錫為錫鉛(Sn80/Pb20)，在150℃下通約104~105 A/cm2的電流密度銲錫高度為70µm，在基板上以無電鍍鎳3µm作為阻絕層。其電遷移下的破壞機制，推測是由於銲錫與IMC反應下的加速溶解，過程中同時觀察到持續的Sn、Pb兩成份重新分布。在其破壞時間(Time-To-Failure)上發現，錫鉛銲錫接點搭配厚膜的UBM(電鍍鎳/電鍍銅)，較薄膜UBM的錫鉛接點更能長時間使用。利用掃描式電子顯微鏡(SEM)與能量分佈X光(EDX)分析破壞過程中，介金屬化合物與銲錫本身相分佈改變下的成分組成。搭配模擬來推測電流的分布，來修正通電過程的電流聚集效應，在利用IR來校正通電過程中，溫度上升的影響。最後將實驗數據，透過修正討論後，驗證Black’s Equation中的活化能為2.1eV與n值為6.2。

Flip Chip Technology is one of the most important packaging methods for high current density IC device. While current density applied increased, solder joint has become a critical issue on device reliability. Concerning electromigration, the device design rule makes each solder bump need to carry 0.2A to 0.5A, and the current density will meet 103~104A/cm2. There is still little study on solder EM with thick UBM structure (Ni/Cu). In this study, thick UBM (electroplating Ni 3µm/Cu 5µm) with SnPb solder (Sn80/Pb20) with 104~105 A/cm2 at elevated 150℃ is investigated. The solder height is about 70µm, and electroless-Ni 3µm as barrier layer at board side. Failure mechanism would be proposed that solder dissolution accelerates continuous IMC formation, and continues redistribution between Sn and Pb was found. The findings in TTF, that Sn80Pb20 solder joints with thick UBM is significant longer than e-SnPb with thin film UBM. In addition, the temperature and current distribution due to current applied was corrected by Infrared Microscopy and simulation to prove Black’s equation’s Q=2.1eV and n=6.2 .