標題: | Modeling and Analysis of Core-Centric Network Processors |
作者: | Lin, Yi-Neng Lin, Ying-Dar Tseng, Kuo-Kun Lai, Yuan-Cheng 交大名義發表 National Chiao Tung University |
關鍵字: | Performance;Verification;Network processor;embedded system;modeling;core-centric;simulation |
公開日期: | 1-Jan-2009 |
摘要: | Network processors can be categorized into two types, the coprocessors-centric model in which the data-plane is handled by coprocessors, and the core-centric model in which the core processes most of the data-plane packets yet offloading some tasks to coprocessors. While the former has been properly explored over various applications, researches regarding the latter remain limited. Based on the previous experience of prototyping the virtual private network (VPN) over the IXP425 network processor, this work aims to derive design implications for the core-centric model performing computational intensive applications. From system and IC vendors' perspectives, the continuous-time Markov chain and Petri net simulations are adopted to explore this architecture. Analytical results prove to be quite inline with those of the simulation and implementation. With subsequent investigation we find that appropriate process run lengths can improve the effective core utilization by 2.26 times, and by offloading the throughput boosts 7.5 times. The results also suggest single process programming since context switch overhead impacts considerably on the performance. |
URI: | http://dx.doi.org/10.1145/1457255.1457260 http://hdl.handle.net/11536/7942 |
ISSN: | 1539-9087 |
DOI: | 10.1145/1457255.1457260 |
期刊: | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS |
Volume: | 8 |
Issue: | 2 |
結束頁: | |
Appears in Collections: | Articles |
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