完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 洪玉仁 | en_US |
dc.contributor.author | Yu-Ren Hung | en_US |
dc.contributor.author | 崔秉鉞 | en_US |
dc.contributor.author | Bing-Yue Tsui | en_US |
dc.date.accessioned | 2014-12-12T03:02:24Z | - |
dc.date.available | 2014-12-12T03:02:24Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009411541 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/80452 | - |
dc.description.abstract | 摘 要 矽化鎳的熱穩定性是奈米CMOS領域持續受到關注是的問題。本論文提出使用Ge離子佈植來改善矽化鎳的熱穩定性,並且應用於P+N與N+P淺接面,以確定此製程應用於CMOS的可行性。 本論文採用先形成矽化鎳再做Ge離子植入(Ge Implantation after silicidation, GIAS)與先做Ge離子植入再形成矽化鎳(Ge implantation before silicidation, GIBS)兩種製程來探討Ge對於矽化鎳的影響。結果顯示GIAS能延緩晶相轉換至850℃,但無法抑制結塊,故熱穩定性沒有明顯的提升。而GIBS製程達到晶相轉換溫度850℃與結塊溫度800℃的效果,其熱穩定性比未做Ge佈植的矽化鎳與高了100℃,猜測其原因為高濃度的Ge在矽化鎳/矽的界面聚集,平衡了在界面上的應力,使得熱穩定性提升,除此之外,從TEM圖中還可發現Ge離子佈植提升了矽化鎳的界面平坦度。 將GIBS的製程應用P+N與N+P接面,發現矽化鎳的特性在P+N接面中雖提升了晶相轉換溫度,但抑制結塊的能力卻未必同時提升。特別是N+P接面中,Ge抑制結塊的能力被As所破壞,故熱穩定性並沒有顯著的提升,但依然保有較佳的界面平坦度,這個性質仍然有利於超淺接面的製作。 在電性上,Ge離子植入的試片會造成鎳的拖曳現象,使得漏電流微幅上升,雖然如此,我們仍得到一個足以應用於CMOS製程的低漏電接面。本論文亦發現Ge離子植入可能可以降低矽基板的能隙,這將有助於降低接觸阻抗,值得進一步研究。 | zh_TW |
dc.description.abstract | ABSTRACT The thermal stability of NiSi/Si structure is one of the important research topics in the nano CMOS area. Several methods have been proposed to improve the thermal stability of NiSi. In this thesis ,a novel method of using Ge ion implantation( Ge I/I) to improve the thermal stability of the NiSi/Si structure is proposed. High quality NiSi-contacted N+P and P+N junctions are fabricated to demonstrate the feasibility of using the Ge I/I technique in nano CMOS process. Two kinds of Ge I/I schemes are used in this thesis to investigate the influence of Ge on NiSi , the Ge I/I After Silicidation (GIAS) and the Ge I/I Before Silicidation (GIBS). The GIAS scheme retard phase transformation to 850℃ but can not suppress agglomeration , so thermal stability is not improved obviously. The GIBS scheme can raises the phase transformation temperature to 850℃ and the agglomeration temperature to 800℃. These temperatures are 100℃ higher than those for the NiSi/Si structure without Ge I/I. This observation is explained by the stress balance due to high concentration Ge pile-up at the NiSi/Si interface. Transmission electron microscope inspection also reveals that the Ge I/I results in a very smooth NiSi/Si interface. Applying GIBS scheme to N+P and P+N junctions, although the phase transformation temperature of NiSi is raised, the agglomeration temperature of NiSi in N+P junction is not improved due to the high concentration As dopants. Although the thermal stability of both N+P and P+N junctions can not be improved obviously by Ge I/I, the NiSi/Si interface roughness is improved. This phenomenon should be benefit to ultra-shallow junctions. Electrical measurement indicates that the Ge I/I junctions exhibit higher leakage current at low temperature. This result is explained by the Ni diffusion and dissolution enhancement due to Ge I/I induced defects. However, acceptable NiSi-contacted N+P and P+N junctions are still obtained. It is suspected that the energy gap of Si is narrowed by the Ge I/I from the activation energy measurement. If it is true , the contact resistance between NiSi and Si could be reduced and is worthy to study furthermore. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 鍺 | zh_TW |
dc.subject | 離子佈植 | zh_TW |
dc.subject | 矽化鎳 | zh_TW |
dc.subject | Ge | en_US |
dc.subject | implant | en_US |
dc.subject | nisi | en_US |
dc.title | 鍺離子佈植對矽化鎳及其接面之影響 | zh_TW |
dc.title | Impact of Ge ion implantation on the Nickel Silicide Contacted Junction | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |