應用於低壓降線性穩壓補償之功率電晶體陣列

Abstract

近幾年來，電源管理晶片設計在單晶片系統應用上成為熱門產業。由於在單晶片系統中的每一方塊電路皆需要不同的電源電壓供應，整合於晶片上的電壓穩壓器即用來個別提供此電源電壓。而在多種的穩壓器中，低壓降線性穩壓器因其小尺寸、低雜訊及快速暫態反應等幾項優點，被視為適合整合於晶片上的穩壓器。 影響低壓降線性穩壓系統之穩定度的一個重要因素為系統極點的位置。在頻率響應分析中，常使用密勒補償來將極點分離以確保穩定度，根據補償的結果可以對極點加以控制及分析。然而在分析後發現許多極點的位置與負載情況有關，為了提供穩定的輸出電壓，需要對極點作觀察與追蹤位置，以確保在重載及輕載情況下都能維持系統的穩定。 本論文提出一個等效功率電晶體陣列來實現極點追蹤，應用於低壓降線性穩壓補償中。利用功率電晶體陣列適當的開關順序來壓縮因負載的改變造成之輸出漣波。而這個與負載有關的功率電晶體陣列提供較平滑的極點追蹤使有效地補償此低壓降線性穩壓器。使用TSMC 0.35um 2P4M製程進行設計與製作，由實驗結果顯示出快速且平滑的極點追蹤效果，與傳統的極點追蹤技術做比較，新的方法有較小的輸出漣波及較快的反應速度，因而此低壓降線性穩壓器可提供更穩定的輸出電壓，也適合用於射頻單晶片系統的應用。

In recent years, power management IC design becomes a popular region in SoC applications. Since each sub-block in SoC system needs different source voltages, on-chip voltage regulators are often used to support it individually. Of all types of the regulators, Low-dropout (LDO) regulator has advantages of small area, low noise, and fast transient response that it is suitable to implement on the chip. An important issue to affect the system stability of LDO regulator is where the location of poles located. In frequency response analysis, Miller compensation is one of the most used methods to split out the poles to ensure the stability. According to the results of Miller compensation, the location of poles can be controlled and analyzed. Based on the analysis, however, some poles depend on the load condition. In order to provide a stable output voltage whenever the load condition is heavy or light, it is necessary to observe and track the location of poles to ensure the stability issue at heavy and light load conditions. This thesis proposes an equivalent power MOSFET array for implementing smooth pole tracking in LDO regulator compensation. Power MOSFET array with suitable turn-on/off sequence is presented to suppress the output ripples in case of load variations. Besides, load dependent power MOSFET array also provides a smooth pole tracking in order to effectively compensate LDO regulator. This proposed LDO regulator circuit is designed by TSMC 0.35um 2P4M process. Experimental results demonstrate good performance of fast and smooth pole tracking. Compared to conventional pole tracking technique, the new technique has low output ripples and fast response time. This technique is a good solution for RF SoC applications.