以TSMC .35um CMOS製程設計及實現一弛緩震盪器

Abstract

本論文以TSMC .35um CMOS 製程實現一輸出為1MHz之弛緩震盪器,為實現微機電電容式加速度規內的震盪器。整個加速度規的架構,前端以MEMS的結構感測震動,而後端則是以交換電容的電路,將感測到的電容變化轉換為電壓變化,而交換電容的電路,就需要做時序控制,因而需要一個震盪器以產生時序,也就是本論文的研究目的。

為了實現一個震盪器,於是探討了環式震盪器、LC震盪器以及弛緩(relaxation)震盪器等數種震盪器形式,經過分析其實現難易度以及所需規格之後,選取結構最簡單的弛緩震盪器來實現。

原本選用的弛緩震盪器內含一比較器及兩個電阻,其後又改以史密特觸發器取代該部分,使得電路實現起來更小;RC充放電的部份,電容值是固定的,而以一組傳輸閘取代了電阻,其導通者工作於飽和區以提供較大的充放電電流;該電路做了兩個外接的控制電壓,使得晶片製成之後,透過外部電壓的調整,可以分別加快或減慢充電及放電的速度,以確實輸出1MHz的頻率提供後續交換電容所需之時序。

實現過程包含了設計MOS的長寬比以形成一史密特觸發器、其觸發準位之分析,以及驗證在外部電壓的調整下,在 tt、 ff、 ss、 fs、 sf 各個角落都能達到至少0.5MHz∼2MHz範圍的震盪頻率;並於電路佈局後,抽取出所有的寄生電阻電容,模擬在 tt、 ff、 ss、 fs、 sf 各個角落都能調整出0.5MHz∼2MHz的震盪頻率;其後將晶片送往CIC製作,送製回來後的量測結果,可以確實輸出1MHz的震盪波形。

This thesis uses the TSMC .35um CMOS process to design and implement a relaxation oscillator of 1MHz for MEMS capacitive accelerometer. The accelerometer consists of a capacitive sensor fabricated via the MEMS design and a sensor circuit usually designed with a switching capacitor circuit which converts the capacitance variation into the voltage variation. The switching capacitor circuit needs a good control of time sequence and thus demands an oscillator to generate the clock signals; the design and implementation of the oscillator is the focus of this thesis.

We first survey several types of oscillators including ring oscillators, LC oscillators and relaxation oscillators; we evaluate their performances and the simplicity of realization. Hence the simplest relaxation oscillator is chosen for implementation in this thesis.

To simplify the circuit complexity, we use a Schmitt trigger to replace conventional circuits with one comparator and two resistors connected in positive feedback scheme. To adjust the oscillation frequency, in the RC pair for charging and discharging we fix the capacitance value and apply a transmission gate as the resistor such that two external control voltages can be used for controlling the charging and discharging current. Then, the oscillation frequency can be controlled by these voltages to provide the switching capacitor circuit with an accurate 1MHz clock.

The critical steps in the implementation of the oscillator includes the design of W/L ratios in MOS transistors to form the Schmitt trigger, the analysis of the trigger levels of the Schmitt trigger, and the verification of at least an oscillator output with frequency range of 0.5MNz∼2MHz at all five corners(tt,ff,ss,fs,and sf) after tuned by external control voltages. The same work is also applied after the layout and its circuit extraction have been made to ensure that the oscillator can export an oscillation frequency range of 0.5MNz∼2MHz at all the corners. The design has been fabricated via CIC; the measure results show that the oscillator functions correctly and can output a clock with 1MHz oscillation frequency.