雙頻道可調式吉伯特混頻器、雙頻道差動低雜訊放大器與毫米波驅動放大器

Abstract

本篇論文主要分為三個主題，分別實現不同的射頻電路。第一，利用本篇論文提出的新型雙頻道正交訊號產生器，達成可調式雙頻道IQ降頻/單邊升頻混波器。第二，實現應用於無線區域網路的雙頻道低雜訊差動放大器，並使用變壓器來降低雜訊。第三，在電路裡結合了傳輸線與共平面波導的方式來實現60GHz驅動放大器。 論文主要以TSMC 0.35μm SiGe BiCOMS製程、TSMC 0.18μm CMOS製程，以及TSMC 0.13μm CMOS製程來研製應用於802.11a/b/g WLAN之射頻電路，在高頻電路設計則是利用WIN 0.15μm PHEMT製程來實現。其中TSMC 0.35μm SiGe BiCOMS製程包含了可調式雙頻道IQ降頻混波器、可調式雙頻道IQ單邊升頻混波器，以及中間級匹配之差動雙頻道LNA等電路。而使用變壓器型態之差動雙頻道LNA 是以TSMC 0.18μm CMOS製程實現，11GHz低雜訊放大器則是以TSMC 0.13μm CMOS製程實現。最後在高頻電路部份，正交相位之次諧波降頻混波器與覆晶封裝之60GHz驅動放大器都以WIN 0.15μm PHEMT製程來實現。

In this thesis, we implement several radio frequency circuits in three subjects. First, tunable dual-band IQ down-converter/SSB up-converter are designed by using the new architecture of dual-band quadrature generator in this thesis. Second, we implement the dual-band LNA for WLAN’s applications and take lower noise figure by using transformer. Third, we combine the micro-strip and the coplanar strip in the circuits to implement 60GHz driving amplifier. In this thesis, we implement several RF circuits for 802.11a/b/g WLAN’s applications by using TSMC 0.35μm SiGe BiCOMS technology process, TSMC 0.18μm CMOS technology process and TSMC 0.13μm CMOS technology process. High frequency circuits are designed and implemented by using WIN 0.15μm PHEMT technology process . In TSMC 0.35μm SiGe BiCOMS technology process, the circuits include the tunable dual-band I/Q down-converter, the tunable dual-band SSB up-converter and the inter-stage matching differential dual-band LNA. We implement the differential dual-band LNA utilizing transformer by using TSMC 0.18μm CMOS technology process and implement the 11GHz low noise amplifier by using TSMC 0.13μm CMOS technology process. Finally, we implement the high frequency circuits include the quadrature RF signal sub-harmonic down-converter and the 60GHz flip-chip driver amplifier by using WIN 0.15μm PHEMT technology process.