馬爾尚分合波器之混頻器與利用除頻器與振盪器之訊號產生電路

Abstract

本篇論文主要是研究在射頻積體電路中的二大主題。第一個主題為被動馬爾尚分合波器，並將其與主動式混頻器結合；第二個主題為訊號產生電路包含除頻器與振盪器。 我們使用TSMC 0.35μm CMOS與TSMC 0.18μm CMOS製程來實作不同類型的馬爾尚分合波器測試元件，接著將馬爾尚分合波器與主動式的微混頻器整合，當成混頻器本地振盪端的輸入，整合電路則是使用TSMC SiGe 0.35μm BiCMOS製程來實作。 在除頻器部分，探討了常見的數位式與類比式除頻電路，在數位式的除頻電路上我們利用TSMC SiGe 0.35μm BiCMOS來實作產生50%工作週期之除5電路；而適合於高頻操作的類比式除頻器，我們則利用Win 0.15μm HEMT高截止頻率的製程技術來實現。在振盪器部分，使用雙變壓器（Trifilar）這個元件來達成訊號的耦合作用，不管是透過串接式電晶體訊號耦合或直接訊號耦合方式皆可以使輸出為正交相位的訊號，振盪器的實作則是利用TSMC 0.18μm CMOS與TSMC 0.13μm CMOS二種製程技術。

In this thesis, we focus on two topics of Radio Frequency Integrated Circuits. The first is Marchand baluns and combination of Marchand baluns and active mixers. The second is signal generation by frequency dividers and oscillators. We implement different type Marchand baluns by using TSMC 0.35μm CMOS technology and TSMC 0.18μm CMOS technology. Then Marchand baluns are integrated into active micro-mixers as LO input element, and it is demonstrated in TSMC 0.35μm SiGe BiCMOS technology process. Conventional analog and digital frequency dividers are discussed in this thesis. We use TSMC 0.35μm SiGe BiCMOS technology process to implement truly 50% duty cycle divide-by-5 digital frequency dividers. Analog frequency dividers are more adaptable for high speed operation than digital ones, and they are implemented in high cut-off frequency Win 0.15μm HEMT technology process. In Oscillator circuits, we utilize trifilar to couple output signals. Direct coupling and series coupling by transistors both can generate quadrature signals. Finally, Quadrature Oscillators are implemented in TSMC 0.18μm CMOS technology process and TSMC 0.13μm CMOS technology process.