低相位雜訊表面聲波壓控振盪器的研究

Abstract

本論文研製一個可應用於同步數位通訊的高頻低功率損耗低相位雜訊的積體化表面聲波振盪器，以皮爾斯振盪器為基礎，並改良加入相位偏移器，進行相位調節，以克服表面聲波共振腔的寄生電容，使振盪時減少損耗，使得此電路能夠達到低功率損耗的目標。本電路以台灣積體電路公司所提供的0.18μm 1P6M CMOS製程實現，輸出頻譜為622.2MHz，相位雜訊在1MHz的 offset頻率以後可以達到-175 dBc/Hz，並且在10 kHz 的offset頻率約有136 dBc/Hz的相位雜訊，輸出強度¬4.07dBm，直流偏壓為1.2V，總電流消耗為15mA。

In this study, a low consumption and low phase noise voltage controlled SAW oscillator is proposed for SDH application. The circuit is deduced from Pierce oscillator. A single resistance is provided for self bias to save the area and power consumption. A phase shifter is used for phase adjustment to overcome the parasitic effect of SAW resonator and to improve the current consumption. The circuit is implemented by tsmc 0.18μm 1P6M CMOS process. The output frequency is at 622.2MHz. The oscillator’s white phase noise floor is –175 dBc/Hz for carrier offset frequency greater than 1 MHz and –136 dBc/Hz at 10 kHz carrier offset. The oscillator provides 4.07 dBm of output power and consumes 15mA from +1.2V DC power supply.