完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Woei-Cherng | en_US |
dc.contributor.author | Chao, Tien-Sheng | en_US |
dc.contributor.author | Chiu, Te-Hsin | en_US |
dc.contributor.author | Wang, Jer-Chyi | en_US |
dc.contributor.author | Lai, Chao-Sung | en_US |
dc.contributor.author | Ma, Ming-Wen | en_US |
dc.contributor.author | Lo, Wen-Cheng | en_US |
dc.date.accessioned | 2014-12-08T15:10:35Z | - |
dc.date.available | 2014-12-08T15:10:35Z | - |
dc.date.issued | 2008-12-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2008.2005519 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/8087 | - |
dc.description.abstract | The positive bias temperature instability (PBTI) characteristics of contact-etch-stop-layer (CESL)-strained HfO(2) nMOSFET are thoroughly investigated. For the first time, the effects of CESL on an HfO(2) dielectric are investigated for PBTI characteristics. A roughly 50% reduction Of V(TH) shift can be achieved for the 300-nm CESL HfO(2) nMOSFET after 1000-s PBTI stressing without obvious HfO(2)/Si interface degradation, as demonstrated by the negligible charge pumping current increase (< 4%). In addition, the HfO(2) film of CESL devices has a deeper trapping level (0.83 eV), indicating that most of the shallow traps (0.75 eV) in as-deposited HfO(2) film can be eliminated for CESL devices. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Positive Bias Temperature Instability (PBTI) Characteristics of Contact-Etch-Stop-Layer-Induced Local-Tensile-Strained HfO(2) nMOSFET | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2008.2005519 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 29 | en_US |
dc.citation.issue | 12 | en_US |
dc.citation.spage | 1340 | en_US |
dc.citation.epage | 1343 | en_US |
dc.contributor.department | 電子物理學系 | zh_TW |
dc.contributor.department | Department of Electrophysics | en_US |
顯示於類別: | 期刊論文 |