複晶矽薄膜電晶體之電性分析與溫度效應之探討

Abstract

在此論文裡，我們將探討橫向結晶(Lateral-Growth Crystallization, LGC)與準分子雷射結晶(Excimer Laser Crystallization, ELC)之N型複晶矽薄膜電晶體在低溫下所衍生的效應，並進一步研究通道中主晶界(main-Grain Boundary, main-GB)對於薄膜電晶體的影響，在此分為三種：主晶界之方向垂直於通道並位於通道中央(VGB)、平行於通道(PGB)與沒有晶界存在於通道中(NGB)之三種元件。 我們亦研究準分子雷射結晶P型通道複晶矽薄膜電晶體的可靠度。利用直流操作來模擬低溫複晶矽薄膜電晶體在使用後的劣化情形，並對閘極施加不同的電壓與操作在不同溫度下，試圖找出元件在劣化情況下的相關係數與其劣化機制。除此之外，我們還探討元件在負偏壓下之溫度不穩定性(Negative Bias Temperature Instability, NBTI)的動態回復與尺寸效應。

In this thesis, we investigate the effects of cryogenic temperature and the main-Grain Boundary (main-GB) orientation in the channel region of N-type polycrystalline silicon thin film transistors (N-type poly-Si TFTs) fabricated by the Lateral-Growth Crystallization (LGC) and Excimer Laser Crystallization (ELC). Dividing the thin film transistors fabricated by lateral-growth crystallization into three kinds further. Described as follows: (1)The orientation of the main-GB is perpendicular to the channel and lie in the middle of the channel, abbreviated VGB. (2)The orientation of the main-GB is parallel with the channel, abbreviated PGB. (3)Without main-GB exists in the channel region, so called NGB. We also study the reliability of p-type polycrystalline silicon thin film transistors (P-type poly-Si TFTs) fabricated by the ELC method. We utilize DC stress to simulate the operation of P-type poly-Si TFTs and observe the degradation degree. Then, adding the different gate bias and operating under various temperature, try to find the coefficients concerned with degradation and its mechanism of the TFTs. Additionally, we also research the dynamic recovery and dimensional effects under Negative Bias Temperature Instability, abbreviated the NBTI.