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dc.contributor.author王炯鑫en_US
dc.contributor.authorChon-Hsin Wangen_US
dc.contributor.author謝宗雍en_US
dc.contributor.authorTsung-Eong Hsiehen_US
dc.date.accessioned2014-12-12T03:06:01Z-
dc.date.available2014-12-12T03:06:01Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009418532en_US
dc.identifier.urihttp://hdl.handle.net/11536/81178-
dc.description.abstract本研究藉由不同條件的電鍍製程製備符合高頻砷化鎵(GaAs)元件覆晶封裝用高50 um、直徑50 um的錫-銅接合凸塊,電鍍實驗條件概分為定電流、定電壓和脈衝電壓,完成之凸塊並以掃描式電子顯微鏡(Scanning Electron Microscopy,SEM)與觀察其內部微觀結構及以推力測試分析凸塊接合強度。定電流實驗之結果顯示以電流密度0.5ASD∼1ASD範圍執行電鍍,不論是否有加入添加劑PEG200,皆可獲得緻密性良好的凸塊;在定電壓實驗中,加入添加劑PEG200確實可以改善凸塊內部的緻密性,這是因為電流值會上升使鍍率升快,增加孔洞的生成,而PEG200能抑制抑制還原反應、減緩沉積速率;另外發現脈衝電壓法因鍍率太慢,不適合用來製備深孔電鍍。能量分散譜儀(Energy Dispersive Spectroscopy,EDS)對凸塊內部的成分分佈顯示,不論是定電流析鍍或定電壓析鍍,使用添加PEG200之鍍液所得之凸塊內部的銅含量均減少。凸塊的推力測試(Shear test)顯示凸塊與基板之剪力強度約在40 Nt/mm2,大致符合符合業界推力測試標準。zh_TW
dc.language.isozh_TWen_US
dc.subject高頻zh_TW
dc.subject覆晶封裝zh_TW
dc.subject錫銅凸塊zh_TW
dc.subject電鍍zh_TW
dc.subjectHigh-frequencyen_US
dc.subjectFlip-chip Bondingen_US
dc.subjectSn-Cu Bumpen_US
dc.subjectElectroplatingen_US
dc.title以電鍍法製備高頻覆晶封裝用錫-銅凸塊之研究zh_TW
dc.titlePreparation of Sn-Cu Bump for High-frequency Flip-chip Bonding Utilizing Electroplating Processen_US
dc.typeThesisen_US
dc.contributor.department材料科學與工程學系zh_TW
Appears in Collections:Thesis


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