標題: 運用溶膠-凝膠法技術製作金屬氧化物奈米結晶粒於快閃記憶體元件之研究
The Study of Flash Memory Devices with Metal Oxide Nanocrystals in Sol-Gel Technique
作者: 鄭延宸
Yen-Chen Cheng
柯富祥
劉增豐
Fu-Hsiang Ko
Tzeng-Feng Liu
材料科學與工程學系奈米科技碩博士班
關鍵字: 記憶體;金屬氧化物;奈米結晶粒;溶膠-凝膠法;快閃記憶體元件;Memory;Metal Oxide;Nanocrystals;S0l-Gel;Flash Memory Devices
公開日期: 2006
摘要: 隨著半導體產業的發展,大眾對於「非揮發性記憶體」的材料與技術也越重視,其中又以具有輕、薄、短、小和可攜帶式的各類電子產品,諸如數位相機、智慧型手機、隨身碟及PDA等尤之。 傳統的浮動閘極型結構非揮發性快閃 (Flash) 記憶體,當記憶體元件的穿隧氧化層膜厚低於10奈米時,會使得原先已儲存於複晶矽材料製作成的浮動閘極內電荷,極易藉由在重複多次讀寫週期後造成的氧化層缺陷,形成漏電路徑,導致儲存在浮動閘極內電荷的資料流失。而複晶矽-氧化物-氮化矽-氧化物-單晶矽 (SONOS) 型結構的快閃記憶體,被提議為解決元件尺寸縮小時,因傳統浮動閘極型結構記憶體所面對的極限問題。在傳統的SONOS型結構記憶體元件上,其儲存電荷的捕陷層材料是氮化矽。此種結構中,因為電荷是被儲存在不同捕陷位置的分散區域內,所以相對可提升傳統浮動閘極型結構對於資料保存性的問題;不過,由於氮化矽材料與二氧化矽之間的導電帶位能差不高,如此會使得記憶體元件的寫入及抹除速度降低。 當利用分離的奈米結晶粒做為電荷儲存之傳導媒介時,此時奈米結晶粒快閃記憶體對於局部性的氧化物缺陷擁有較佳的免疫能力。而它在很多方面也具有益處:如較多的電荷捕陷區域、較大的臨限電壓變化、較長的電荷保存時間,以及良好的耐用特性。因此藉由高介電材料形成奈米結構結晶粒取代快閃記憶體元件電荷捕陷層之研究,目前正被大量探討中。 現今雖然高介電材料的沉積方式繁多,例如:原子層沉積法、物理氣相沉積法(如雙電子槍蒸鍍系統、真空濺鍍系統)、化學氣相沉積法、有機金屬化學氣相沉積法,但是上述幾種沉積法需要的成本皆相當昂貴。在本篇論文中則提出了使用溶膠-凝膠法技術來沉積高介電與金屬氧化物材料,以作為奈米結晶粒快閃記憶體元件電荷捕陷層的製作方法。相較其他方法而言,溶膠-凝膠法的優點在於價格較便宜,又可迅速的配出兩元或三元成份以上組成的奈米結晶粒,對比於一般的高真空沉積環境設備上,更具省時及便利性。 在本研究論文的第二、三章中,我們依序製作出奈米結晶粒快閃記憶體元件以及充分利用了溶膠-凝膠法技術,將二氯化鈷、四氯化鍺、四氯化金、四氧氯化鋰、二氯化鎳、四氯化矽、四氯化鋯等元素做為前驅物,來製備多元化學複合物成份的奈米結晶粒。個別先將前驅氯化物溶入異丙醇及酒精溶劑中,藉由溶膠-凝膠法在穿隧氧化層上沉積金屬氯化物材料,再經過1050度、60秒的快速熱退火與氧化步驟後,形成多種不同種類組成的金屬氧化物薄膜及奈米結晶粒,即是為快閃記憶體元件的電荷捕陷層。在元件電性方面,顯示了使用溶膠-凝膠法沉積出的金屬氧化物電荷捕陷層,確實具有良好的記憶體儲存效應,例如較大的記憶區間、快速的寫入/抹除速度、持久的電荷保存/耐用率、極小的閘/汲極干擾等優點。此外,從論文內的高解析度穿透式電子顯微鏡 (HRTEM) 儀器圖像中也可看出,元件的電荷捕陷層經過了1050度、60秒的快速熱退火與氧化步驟後,的確已形成了奈米尺度之球狀體或橢圓形狀奈米結晶粒或複合物薄膜。 最後,由此實驗的顯著性奈米結構特徵,使我們相信溶膠-凝膠法技術是一種既低價位、快速又具效率,可應用於製作金屬氧化物薄膜或奈米結晶粒,作為快閃記憶體元件電荷捕陷層的好方法。
As overall semiconductor industry development, the technology of material science is extremely significant on non-volatile memory (NVM) in every field of human's life, especially in lightness, thinness, shortness, and smallness with portable electronic products like digital camera, smart cell phone, flash drive disk, and PDA, etc. On non-volatile Flash memory of the conventional floating-gate (FG) structure, when the tunnel oxide thickness of a memory device is less than 10 nm, storage charges in the polysilicon floating gate are easy to leak along the path through oxide bulk defects during programming/erasing (P/E) cycles. The polysilicon-oxide-nitride-oxide-silicon (SONOS) Flash memory structure is recommended that we resolve this limitation with a device scaling down. The charge-trapping layer of a customary SONOS memory device is silicon nitride (Si3N4). Because storage charges are trapped in discrete traps diversely, they can enhance charge retention of the FG structure. The traditional SONOS memory device has good data storage; however, the conduction band offset between Si3N4 and silicon dioxide (SiO2) is not large. This result leads to slower P/E speed of the memory device. By using discrete nanocrystals (NCs) as the charge storage medium, the nanocrystal (NC) Flash memory is more immune to local oxide defects. It is considered to be more beneficial in many aspects: more charge-trapping sites, larger Vth or VT shift (△Vth or △VT) memory window, longer retention time, and good endurance cycles. Thus, applying high-k dielectric materials to form nano-composite NCs to substitute for the charge-trapping layer in a Flash memory device has been extensively researched. Up to now, despite the fact that such numerous high-k dielectric deposition methods have been supplied for atomic layer deposition (ALD), physical vapor deposition (PVD) (e.g., Dual E-Gun Evaporation System, Sputtering System), chemical vapor deposition (CVD), and metal-organic chemical vapor deposition (MOCVD), they are high cost. In this study, we present Sol-Gel technique as a way to deposit high-k dielectrics and metal oxide (MxOy) materials for the charge-trapping layer in the NC Flash memory devices. Contrary to high vacuum compatible equipments, many advantages of the Sol-Gel spin coating method are lower costs, more convenient tools, and easier processes to synthesize the combination of binary or ternary MxOy NCs in the normal pressure environment. In the chapter 2 and 3, we gradually fabricated the NC Flash memory devices and made good use of Sol-Gel technique with (CoCl2.6H2O), GeCl4, (HAuCl4.3H2O), LiClO4, (NiCl2.6H2O), SiCl4, and ZrCl4 elements as precursors to deposit the NCs consisting of several chemical compounds. These precursors of distinct metal chloride (MxCly) powder were mixed and dissolved into isopropanol (IPA) and C2H5OH, deposited on the tunnel oxide layer by the Sol-Gel spin coating procedure, and followed with the 1050o C 60 sec. oxide rapid thermal annealing (ORTA) step in the O2 environment to form various kinds of the MxOy thin film or NCs as the charge-trapping layer of the Flash memory devices, respectively. This MxOy NC charge-trapping layer extracted from the Sol-Gel spin coating method included in the device exhibited good electrical properties, such as relatively large memory window, high P/E speed, long data retention/endurance time, little gate/drain (G/D) disturbance, and so on. Moreover, the high-resolution transmission microscopy (HRTEM) instrument was conducted to research the physical properties of binary or ternary MxOy NCs as well. From the HRTEM images, each trapping layer of the devices truly was shaped into nano-sized round balls or oval-shaped NCs or a composite thin film after the 1050o C 60 sec. oxide rapid thermal annealing (ORTA) step. In the long run, by reason of prominently nano-structured features in the memory devices for our experiments, we believe Sol-Gel technique is a low-priced, instant, and efficient method to fabricate the MxOy thin film or NCs as the charge-trapping layer of Flash memory devices.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009452510
http://hdl.handle.net/11536/82017
Appears in Collections:Thesis


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