标题: 一种应用于NAND 型快闪记忆体之基于抹除码的平行化技术
An Erasure-code-based Striping Scheme for NAND-Flash Storage System
作者: 张誉缤
Yu-Bin Chang
张立平
Li-Pin Chang
网路工程研究所
关键字: 快闪记忆体;储存系统;入式系统;作业系统;Flash memory;storage systems;embedded systems;operating systems
公开日期: 2007
摘要: 在一块大块的快闪记忆体中,使用多重小块的快闪记忆体(bank)做平行化存取,主要是用來提高系统存取时的效能,此种做法已经很普遍了,然而,现实环境中的资料存取,将使得各个bank 间存取工作量的不平均,如此导致平行化存取产生的效能被限制住,在这篇研究中,我们将比较常存取的资料作编码成另一份资料,这類资料也就是消除码(erasure codes),因为消除码只要与部份的原始资料一起做解码后,即可回復原本的资料,而一份要求中含很多的小型工作,研究的目的是希望能将小型工作从工作量重的bank 中,藉由其余工作量轻的bank 中的消除码取代,如此达到bank间工作量的平衡,研究中主要讨論分成(1)如何制作与分派消除码(2)如何放置消除码于bank 中(3)消除码分派与放置完后,一份要求來后该如何的做排班。由实验结果,我们发现只要提供10%的额外空间作消除码,即可使得
讀取的动作提高了50%的效能。
To use multiple memory banks in parallel is a nature approach to boost the performance of flash-memory storage systems. However, realistic data-access localities unevenly load each memory bank and thus the benefits of parallelism
is severely limited. In this work, we propose to encode popular data with redundancy by means of erasure codes. Load balancing is thus achieved by accessing only lightly loaded banks, because to retrieve a subset of data blocks
and code blocks sufficiently reconstructs the requested data. The technical issues pertain to redundancy allocation, redundancy placement, and request scheduling.
By experiments, we found that, by offering 10% extra redundant space, the read response time is largely improved by 50%.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009456558
http://hdl.handle.net/11536/82216
显示于类别:Thesis


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