Characterization of poly-Si TFT variation using interdigitated method

Abstract

In this paper, the device variation characteristic of poly-Si TFTs is statistically investigated. First the variation of devices is examined with respect to different device distance. It is found that the device variation would exhibit similar behavior for different device distance. Then, in order to study the method to suppress device variation, the interdigitated layout is adopted. It is found that though the variation behavior of the poly-Si TFTs is much more serious and complicated than MOSFETs, the law of area can still be utilized to describe the variation behavior in the interdigitated layout. The fitting parameters in law of area can provide insights for understanding the intrinsic variation behavior for poly-Si TFTs and the discussion about the variation for the device with various channel width is provided. The variation behavior of poly-Si TFTs is then compared with amorphous silicon TFTs and single crystal silicon MOSFETs. The impacts of poly-Si TFT variation on circuit design and performance is also discussed. (C) 2008 Elsevier Ltd. All rights reserved.