完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Yu-Ning | en_US |
dc.contributor.author | Li, Yih-Lang | en_US |
dc.contributor.author | Lin, Wei-Tin | en_US |
dc.contributor.author | Cheng, Wen-Nai | en_US |
dc.date.accessioned | 2014-12-08T15:02:10Z | - |
dc.date.available | 2014-12-08T15:02:10Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.isbn | 978-1-60558-048-7 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/863 | - |
dc.description.abstract | Track assignment, which is an intermediate stage between global routing and detailed routing, provides a good platform for promoting performance, and for imposing additional constraints during routing, such as crosstalk. Gridless track assignment (GTA) has not been addressed in public literature. This work develops a gridless routing system integrating a congestion-driven global router, crosstalk-driven GTA and an enhanced implicit connection-graph-based router. Initial assignment is produced rapidly with a left-edge like algorithm. Crosstalk reduction on the assignment is then transformed to a restricted non-slicing floorplanning problem, and a deterministic O-tree based algorithm is employed to re-assign each net segment. Finally, each panel is partitioned into several sub-panels, and the sub-panels are re-ordered using branch and bound algorithm to decrease the crosstalk further. Before detailed routing, routing tree construction is undertook for placed IRoutes and other pins; many original point-to-point routings are set to connect to IRoutes, and can be accomplished simply with pattern routing. For detailed routing, this work proposes a rapid extraction method for pseudo-maximum stripped tiles to boost path propagation. Experimental results demonstrate that the proposed gridless routing system has over 2.66 times the runtime speedup for fixed- and variable-rule routings of an implicit connection-graph-based router, NEMO. As compared with a commercial routing tool, this work yields an average reduction rate of 15% in coupling capacitance calculated using its built-in coupling capacitance estimator. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Gridless routing | en_US |
dc.subject | non-slicing floorplanning | en_US |
dc.subject | crosstalk reduction | en_US |
dc.subject | implicit connection graph-based router | en_US |
dc.subject | full-chip routing | en_US |
dc.subject | detailed routing | en_US |
dc.title | Non-Slicing Floorplanning-Based Crosstalk Reduction on Gridless Track Assignment for a Gridless Routing System with Fast Pseudo-Tile Extraction | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ISPD'08: PROCEEDINGS OF THE 2008 ACM INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN | en_US |
dc.citation.spage | 134 | en_US |
dc.citation.epage | 141 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000265977700022 | - |
顯示於類別: | 會議論文 |