單晶片系統之電腦輔助設計研究

Full metadata record

DC Field	Value	Language
dc.contributor.author	周景揚	en_US
dc.contributor.author	JOU JING-YANG	en_US
dc.date.accessioned	2014-12-13T10:29:17Z	-
dc.date.available	2014-12-13T10:29:17Z	-
dc.date.issued	2000	en_US
dc.identifier.govdoc	NSC89-2215-E009-058	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/89066	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=541892&docId=99524	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	單晶片系統	zh_TW
dc.subject	電腦輔助設計	zh_TW
dc.subject	系統驗證	zh_TW
dc.subject	硬體合成	zh_TW
dc.subject	System-on-a-chip (SOC)	en_US
dc.subject	Computer-aided design (CAD)	en_US
dc.subject	System verification	en_US
dc.subject	Hardware synthesis	en_US
dc.title	單晶片系統之電腦輔助設計研究	zh_TW
dc.title	The Study of CAD for System-on-a-Chip	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
Appears in Collections:	Research Plans