硬體-軟體共同設計之研究

Abstract

本論文的主旨在探討與發展一個適用於多媒體處理應用有效的系統層次設計方法。我們採用軟硬體共同開發的方式來設計這些系統，使硬體與軟體設計在整個過程中能緊密配合。給定系統的功能與限制規格，我們提出一個模型來描述系統。當此模型被分析過後，就用分割的方法來決定哪些部份的系統功能該分配到特殊應用的硬體，而哪些是交給在處理機上的軟體執行。根據硬體—軟體分割的結果，我們決定系統合適的實現方式。另外，我們還研究關於系統同步的方法與硬體與軟體之間介面的設計以解決兩者通訊機制的問題。這種軟硬體共同開發的設計方法，使得以可程式化元件和特殊應用單元建造一個具即時限制的訊號處理系統晶片成為可能。 我們以一個媒體處理器的設計為例，驗證的方法以及模擬結果也在本論文中提出。

This thesis investigates an effective approach to the system-level design of multimedia signal processing applications. To design these systems, we use the hardware/software codesign approach, which allows the hardware and software designs to be tightly coupled throughout the design process. Given a specification of system functionality and constraints, we propose a model to describe the system. After the model has been analyzed, partitioning is used to determine the parts of the system functionality that are delegated to application-specific hardware and the software that runs on the processor. Based on the result of hardware/software partitioning, we determine the optimal implementation of a system. We also explore issues concerning system synchronization and the implementation of hardware/software interface to accommodate communications between various parts of the system. This hardware and software codesign approach proposed makes it possible to build a time-constrained signal processing system on a chip using programmable parts and application-specific units. We use a media processor design as an example. The verification method and simulation results are also given in this thesis. 1.1 Multimedia processing computing requirements and characteristics 1.2 Hardware/software codesign of media processor Chapter 2 System modeling and analysis 2.1 Functional flow graph model 2.2 Block diagram input 2.3 Specification analysis 2.4 Summary Chapter 3 Hardware/software partitioning 3.1 Hardware and software tasks characteristics 3.2 Preliminary partitioning 3.3 Task granularity analysis Chapter 4 Hardware, software, and interface implementation 4.1 Architecture design 4.2 Hardware/software interface and synchronization 4.2.1 Dedicated interface unit 4.2.2 Shared-memory interface and synchronization 4.3 Software generation Chapter 5 System verification and integrated simulation 5.1 Hardware/software co-verification 5.1.1 Functional simulation 5.1.2 Load balancing analysis 5.1.3 Microarchitecture-level simulation 5.2 Simulation results 5.2.1 Motion estimation 5.2.2 Discrete cosine transform Chapter 6 Conclusions and future work 6.1 Summary 6.1.1 System modeling 6.1.2 Specification capture/analysis 6.1.3 Hardware/software partitioning 6.1.4 Hardware/software interface 6.2 Future work References