應用多型機制於非同步電路之設計

Abstract

現今積體電路越來越複雜，沒有更高階抽象化設計是不行的，尤其為了縮短硬體設計生產率與硬體複雜度之間距離，選擇物件導向設計方式就是一個好的方法。硬體設計在系統階段採用物件導向設計方式越來越廣泛，因為物件導向設計可以當做可合成之硬體的規格而增加其生產率、可讀性與重複使用性。物件導向設計的三大特性：繼承、封裝與多型，缺少任一項便使設計失去彈性，基本上將多型實作成硬體比用軟體實做執行速度上來的快很多，所以在這篇論文中我們將多型實做成硬體。

採用同步電路來實作硬體通常會碰到一些同步問題如時間訊號不同步到達、耗電、易受外在環境影響等。為了解決這些問題並考慮到非同步電路其他一些好處，因此在這篇論文中我們將採用非同步的設計方式達到省電及易於整合系統功能。

As integrated circuit becomes more complexity, it gets more difficult to handle the design without higher level abstraction. To shorten the time-to-market and still-growing gap between design productivity and design complexity, object oriented (OO) methodology is one answer to this challenge. Therefore object oriented languages, like C++ and Java, have a gained more and more popularity in the field of hardware design at system level. And it can be used for the hardware specification to increase productivity, readability, reusability. Polymorphism is a key feature in OO. Supporting polymorphism at hardware level shows a gain in speed over a pure software implementation, so this research proposes an efficient polymorphic implementation mechanism in hardware.

Additionally, designing the hardware by synchronous circuit causes problems such as clock distribution, parameter variation, and power consumption. Asynchronous circuit hardware implementation was adopted to significantly alleviate these problems. In our research, we will implement the hardware by asynchronous circuits to save power consumption and migrate to all system components easily.