Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 黃俊達 | en_US |
dc.contributor.author | Huang Juinn-Dar | en_US |
dc.date.accessioned | 2014-12-13T10:29:33Z | - |
dc.date.available | 2014-12-13T10:29:33Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.govdoc | NSC95-2220-E009-006 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/89408 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1279565&docId=234475 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | e-Home核心技術之研究---子計畫五:晶片上匯流排之架構設計及效能分析技術(III) | zh_TW |
dc.title | Technologies on Architecture Design and Performance Analysis of On-Chip Bus(III) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 交通大學電子工程系 | zh_TW |
Appears in Collections: | Research Plans |