Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 江蕙如 | en_US |
| dc.contributor.author | Jiang Iris Hui-Ru | en_US |
| dc.date.accessioned | 2014-12-13T10:30:52Z | - |
| dc.date.available | 2014-12-13T10:30:52Z | - |
| dc.date.issued | 2005 | en_US |
| dc.identifier.govdoc | NSC94-2220-E009-042 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/90508 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1147358&docId=220367 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 單晶片系統驗證之核心技術開發-子計畫四：單晶片系統設計流程之實體驗證(I) | zh_TW |
| dc.title | Physical Verification for SoC Design Flow(I) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 交通大學電子工程系 | zh_TW |
| Appears in Collections: | Research Plans | |
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