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dc.contributor.author汪大暉en_US
dc.contributor.authorWANG TAHUIen_US
dc.date.accessioned2014-12-13T10:31:01Z-
dc.date.available2014-12-13T10:31:01Z-
dc.date.issued2005en_US
dc.identifier.govdocNSC94-2215-E009-004zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/90632-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1143833&docId=219363en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title雙位元儲存氮化矽快閃式記憶元件技術及可靠性(III)zh_TW
dc.titleDual-Bit Storage Nitride Trap Flash Memory Device Technology and Reliability(III)en_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程系zh_TW
Appears in Collections:Research Plans


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