單晶片系統驗證之核心技術開發-子計畫一：高階合成之形式驗證技術研究

Title:	單晶片系統驗證之核心技術開發-子計畫一：高階合成之形式驗證技術研究 Study on Formal Verification for High-Level Synthesis
Authors:	董蘭榮 Dung Lan-Rong 交通大學電機與控制工程系
Issue Date:	2005
Gov't Doc #:	NSC94-2220-E009-039
URI:	http://hdl.handle.net/11536/90725 https://www.grb.gov.tw/search/planDetail?id=1147349&docId=220364
Appears in Collections:	Research Plans

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