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DC 欄位語言
dc.contributor.authorLee, Yu-Hueien_US
dc.contributor.authorYang, Yao-Yien_US
dc.contributor.authorWang, Shih-Jungen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorLin, Ying-Hsien_US
dc.contributor.authorChen, Yi-Kuangen_US
dc.contributor.authorHuang, Chen-Chihen_US
dc.date.accessioned2014-12-08T15:11:50Z-
dc.date.available2014-12-08T15:11:50Z-
dc.date.issued2011-04-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JSSC.2011.2108850en_US
dc.identifier.urihttp://hdl.handle.net/11536/9085-
dc.description.abstractThe proposed single-inductor dual-output (SIDO) converter with interleaving energy-conservation mode (IECM) control is designed using 65 nm technology to power the ultra-wide band (UWB) system. The energy-conservation mode (ECM) control generates four different energy delivery paths for dual buck outputs with only one inductor. In addition, the superposition technique is used to achieve a minimized inductor current level. The average inductor current is equal to the summation of two output loads. Moreover, the IECM control activates the interleaving operation through the current interleaving mechanism to provide large driving capability as well as to reduce the output voltage ripple. As a result, 91% peak efficiency is derived and the output voltage ripple appears notably minimized by 50% using current interleaving at heavy load. The test chip occupies 1.44 mm(2) in 65 nm CMOS and integrates with a three-dimensional (3-D) architecture for inductor integration.en_US
dc.language.isoen_USen_US
dc.subjectCurrent interleavingen_US
dc.subjectDC-DC converteren_US
dc.subjectenergy delivery pathen_US
dc.subjectoutput voltage rippleen_US
dc.subjectpower conversion efficiencyen_US
dc.subjectsingle-inductor dual-output (SIDO) converteren_US
dc.subjectultra-wide band (UWB) systemen_US
dc.titleInterleaving Energy-Conservation Mode (IECM) Control in Single-Inductor Dual-Output (SIDO) Step-Down Converters With 91% Peak Efficiencyen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JSSC.2011.2108850en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume46en_US
dc.citation.issue4en_US
dc.citation.spage904en_US
dc.citation.epage915en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000288762800019-
dc.citation.woscount9-
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