Estimation of the effect of channel shortening for P-type poly-Si TFTs under AC stress

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DC 欄位	值	語言
dc.contributor.author	Huang, Shih-Che	en_US
dc.contributor.author	Tsao, Hung-Chuan	en_US
dc.contributor.author	Tai, Ya-Hsiang	en_US
dc.date.accessioned	2014-12-08T15:11:53Z	-
dc.date.available	2014-12-08T15:11:53Z	-
dc.date.issued	2007	en_US
dc.identifier.isbn	978-957-28522-4-8	en_US
dc.identifier.uri	http://hdl.handle.net/11536/9112	-
dc.description.abstract	The behavior of the channel shortening effect of the P-type poly-Si TFTs under gate dynamic stress is examined with the I-V and C-V curves. It is discovered the effect is similar to the HEIP effect in P-MOSFETs. The affected channel length estimated from C-V curves is also in accordance with the increased mobility extracted from the I-V curves.	en_US
dc.language.iso	en_US	en_US
dc.title	Estimation of the effect of channel shortening for P-type poly-Si TFTs under AC stress	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	IDMC'07: PROCEEDINGS OF THE INTERNATIONAL DISPLAY MANUFACTURING CONFERENCE 2007	en_US
dc.citation.spage	134	en_US
dc.citation.epage	137	en_US
dc.contributor.department	光電工程學系	zh_TW
dc.contributor.department	Department of Photonics	en_US
dc.identifier.wosnumber	WOS:000258177700033	-
顯示於類別：	會議論文